From patchwork Wed Jan 24 18:34:44 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 125705 Delivered-To: patch@linaro.org Received: by 10.46.66.141 with SMTP id h13csp591994ljf; Wed, 24 Jan 2018 10:37:03 -0800 (PST) X-Google-Smtp-Source: AH8x224MKnytPk4b0yc7J8MMYvUPM0XfQDNkTpsBd9DO9QWQR48doaH95WL2tf95STmnUxRK77RC X-Received: by 10.36.22.207 with SMTP id a198mr9780948ita.138.1516819022857; Wed, 24 Jan 2018 10:37:02 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1516819022; cv=none; d=google.com; s=arc-20160816; b=mYRHPXe7GASOHSdZ2MZzb4qlPEbqR03re6cwbQkWj3svjtkC24813S5iZbQT9Zwh8m +XLJKp/kQvwotl+guVyZgdbSfZby45ENxp5b6L6ctbBSejiTCWc1JCZ3cJqrfh5LEHSA LphGAGQQziw/wVH36n3ekMu7s1mqroWZH/73zLz9nWJMvOcsbAyE4cQjmnXMCxDgO63G LE3ku7UhIVZ/qQg6JU4XpNTU2cGx4fuFLKkl/81sA7Oy+zMvHWd2A8LRh98As86gYtj4 uk+HhyepLvurksJVzFniB7q4OYMXpfGrH1XqVCqRIW/HXiRc5S+ecqbQA/1RhyuYUaUy ZLVQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:cc:references:in-reply-to:message-id:date:to :from:dkim-signature:arc-authentication-results; bh=cv+OEP4hGZoFk3FWq0Sye02AHD5qlEZB+T8zBSuabHU=; b=IdgylY6PQZTsJCGlt86W7vK9gbMck9QGwWnenBlhc68682pn6IMjxlN3mtZYeEt01R USEQNxwaMrnXiznVRPsIMFtLTj2LoL55OETUTNMomRmVb76NjKe7V1oXVKYn9qEm7apT R/Q6VtWFMXyrtV/ccZDQS9RsEq1IP2JNnQj1/rsUerEqvAodwwzwOiOH8a6QUQaZ4c+H RC03Uyb6fGgYFdxDuXxPRyAt4x6s8UWzTmkr+jkVBkRZI+WmHf0s/RcMXv/qRRL7oQ8q 13rjvodh0+M1tl5pqCoU8LfXkxI5HW+NFy2HnE5+3lH+KI8UEB0JDgcTCSp1pcptQADk fPuQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=H1S4FpWx; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id c17si637876itc.33.2018.01.24.10.37.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 24 Jan 2018 10:37:02 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=H1S4FpWx; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1eePss-0001dJ-88; Wed, 24 Jan 2018 18:34:54 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1eePsq-0001cW-MN for xen-devel@lists.xen.org; Wed, 24 Jan 2018 18:34:52 +0000 X-Inumbo-ID: 40ad9a73-0135-11e8-ba59-bc764e045a96 Received: from mail-wr0-x242.google.com (unknown [2a00:1450:400c:c0c::242]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTPS id 40ad9a73-0135-11e8-ba59-bc764e045a96; Wed, 24 Jan 2018 19:34:47 +0100 (CET) Received: by mail-wr0-x242.google.com with SMTP id g21so5029846wrb.13 for ; Wed, 24 Jan 2018 10:34:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=qe5V0UgMbc9nMwDoYRekhINhrdP82C7Wv6MNuvfmsyk=; b=H1S4FpWxqCgin38obESEOaNQ+PvFblZspadaeXaksYsiIOT+EVdmnK9PxDW9Epvfn1 Qt6sMRmMDk26mbdpPf0+HjGX67fgk1LmNe3srcSxdmADUKJacXgeAGrNDgKffynWtQcG AM7Tz80wqP32jZOh1IvwrOHt2cxrJsdpBpCF8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=qe5V0UgMbc9nMwDoYRekhINhrdP82C7Wv6MNuvfmsyk=; b=DrQ8lh3LfCOHQOu7qVU69PlA5LjaZIpkjfTxAFB0xdm3Lv2uJA2JuzvI4hEmV0SDCl f4R/6Ks+7VOnurhjEUS5+fXook03HIR6nFjtAOwJwvVEFTjNiEPxP3xmXl+J8SiUgxFh /vOsJHwejSQb2942vo7LAmCKj19qS3eMaLmya1a4+CHuztraBFv8K9UVauY19E5pVkko PF55L4aGhEKCY1Cee0DO4mgX0iZF1SQvQ2G7KsiDjuUxjL4xOvcU2/+q+L1ZYPv+UuE5 zArivHAbDGWl7hpllBXwbffwJ0teP3zny/WbE0d0G4aTCS+emqX3ebK+xvb/NmL5yVp2 I0oA== X-Gm-Message-State: AKwxyteTGZbNBtMit9WrjbdYsiD8q/WuUHxFKjTfV9ZykyWYx0C+1qv9 M6bLL3Yi8bIm4d4NdpoQnrDtx9q6cWY= X-Received: by 10.223.176.173 with SMTP id i42mr6353783wra.47.1516818889622; Wed, 24 Jan 2018 10:34:49 -0800 (PST) Received: from e108454-lin.cambridge.arm.com ([2001:41d0:1:6c23::1]) by smtp.gmail.com with ESMTPSA id 186sm1080120wmu.16.2018.01.24.10.34.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 24 Jan 2018 10:34:49 -0800 (PST) From: Julien Grall To: xen-devel@lists.xen.org Date: Wed, 24 Jan 2018 18:34:44 +0000 Message-Id: <20180124183445.23705-3-julien.grall@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180124183445.23705-1-julien.grall@linaro.org> References: <20180124183445.23705-1-julien.grall@linaro.org> Cc: sstabellini@kernel.org, volodymyr_babchuk@epam.com, andre.przywara@linaro.org, Julien Grall Subject: [Xen-devel] [PATCH 2/3] xen/arm: vsmc: Don't implement function ID that doesn't exist X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" The current implementation of SMCCC relies on the fact only function number (bits [15:0]) is enough to identify what to implement. However, PSCI call are only available in the range 0x84000000-0x8400001F and 0xC4000000-0xC400001F. Furthermore, not all SMC32 functions have equivalent in the SMC64. This is the case of: * PSCI_VERSION * CPU_OFF * MIGRATE_INFO_TYPE * SYSTEM_OFF * SYSTEM_RESET Similarly call count, uid, revision can only be query using smc32/hvc32 fast calls (See 6.2 in ARM DEN 0028B). Xen should only implement identifier existing in the specification in order to avoid potential clash with later revision. Therefore rework the vsmc code to use the whole function identifier rather than only the function number. Signed-off-by: Julien Grall --- This should be backported to Xen 4.10 as we should not implement functions identifier that does not exist toprevent clash with a later revision. --- xen/arch/arm/vsmc.c | 37 +++++++++++++++++++++---------------- xen/include/asm-arm/smccc.h | 20 +++++++++++++++++--- 2 files changed, 38 insertions(+), 19 deletions(-) diff --git a/xen/arch/arm/vsmc.c b/xen/arch/arm/vsmc.c index 563c2d8dda..7ca2880173 100644 --- a/xen/arch/arm/vsmc.c +++ b/xen/arch/arm/vsmc.c @@ -84,13 +84,15 @@ static bool fill_function_call_count(struct cpu_user_regs *regs, uint32_t cnt) /* SMCCC interface for hypervisor. Tell about itself. */ static bool handle_hypervisor(struct cpu_user_regs *regs) { - switch ( smccc_get_fn(get_user_reg(regs, 0)) ) + uint32_t fid = (uint32_t)get_user_reg(regs, 0); + + switch ( fid ) { - case ARM_SMCCC_FUNC_CALL_COUNT: + case ARM_SMCCC_FUNC_CALL_COUNT(HYPERVISOR): return fill_function_call_count(regs, XEN_SMCCC_FUNCTION_COUNT); - case ARM_SMCCC_FUNC_CALL_UID: + case ARM_SMCCC_FUNC_CALL_UID(HYPERVISOR): return fill_uid(regs, XEN_SMCCC_UID); - case ARM_SMCCC_FUNC_CALL_REVISION: + case ARM_SMCCC_FUNC_CALL_REVISION(HYPERVISOR): return fill_revision(regs, XEN_SMCCC_MAJOR_REVISION, XEN_SMCCC_MINOR_REVISION); default: @@ -140,36 +142,37 @@ static bool handle_sssc(struct cpu_user_regs *regs) { uint32_t fid = (uint32_t)get_user_reg(regs, 0); - switch ( smccc_get_fn(fid) ) + switch ( fid ) { - case PSCI_0_2_FN_PSCI_VERSION: + case PSCI_0_2_FN32(PSCI_VERSION): perfc_incr(vpsci_version); PSCI_SET_RESULT(regs, do_psci_0_2_version()); return true; - case PSCI_0_2_FN_CPU_OFF: + case PSCI_0_2_FN32(CPU_OFF): perfc_incr(vpsci_cpu_off); PSCI_SET_RESULT(regs, do_psci_0_2_cpu_off()); return true; - case PSCI_0_2_FN_MIGRATE_INFO_TYPE: + case PSCI_0_2_FN32(MIGRATE_INFO_TYPE): perfc_incr(vpsci_migrate_info_type); PSCI_SET_RESULT(regs, do_psci_0_2_migrate_info_type()); return true; - case PSCI_0_2_FN_SYSTEM_OFF: + case PSCI_0_2_FN32(SYSTEM_OFF): perfc_incr(vpsci_system_off); do_psci_0_2_system_off(); PSCI_SET_RESULT(regs, PSCI_INTERNAL_FAILURE); return true; - case PSCI_0_2_FN_SYSTEM_RESET: + case PSCI_0_2_FN32(SYSTEM_RESET): perfc_incr(vpsci_system_reset); do_psci_0_2_system_reset(); PSCI_SET_RESULT(regs, PSCI_INTERNAL_FAILURE); return true; - case PSCI_0_2_FN_CPU_ON: + case PSCI_0_2_FN32(CPU_ON): + case PSCI_0_2_FN64(CPU_ON): { register_t vcpuid = PSCI_ARG(regs, 1); register_t epoint = PSCI_ARG(regs, 2); @@ -180,7 +183,8 @@ static bool handle_sssc(struct cpu_user_regs *regs) return true; } - case PSCI_0_2_FN_CPU_SUSPEND: + case PSCI_0_2_FN32(CPU_SUSPEND): + case PSCI_0_2_FN64(CPU_SUSPEND): { uint32_t pstate = PSCI_ARG32(regs, 1); register_t epoint = PSCI_ARG(regs, 2); @@ -191,7 +195,8 @@ static bool handle_sssc(struct cpu_user_regs *regs) return true; } - case PSCI_0_2_FN_AFFINITY_INFO: + case PSCI_0_2_FN32(AFFINITY_INFO): + case PSCI_0_2_FN64(AFFINITY_INFO): { register_t taff = PSCI_ARG(regs, 1); uint32_t laff = PSCI_ARG32(regs, 2); @@ -201,13 +206,13 @@ static bool handle_sssc(struct cpu_user_regs *regs) return true; } - case ARM_SMCCC_FUNC_CALL_COUNT: + case ARM_SMCCC_FUNC_CALL_COUNT(STANDARD): return fill_function_call_count(regs, SSSC_SMCCC_FUNCTION_COUNT); - case ARM_SMCCC_FUNC_CALL_UID: + case ARM_SMCCC_FUNC_CALL_UID(STANDARD): return fill_uid(regs, SSSC_SMCCC_UID); - case ARM_SMCCC_FUNC_CALL_REVISION: + case ARM_SMCCC_FUNC_CALL_REVISION(STANDARD): return fill_revision(regs, SSSC_SMCCC_MAJOR_REVISION, SSSC_SMCCC_MINOR_REVISION); diff --git a/xen/include/asm-arm/smccc.h b/xen/include/asm-arm/smccc.h index f543dea0bb..303517459f 100644 --- a/xen/include/asm-arm/smccc.h +++ b/xen/include/asm-arm/smccc.h @@ -82,9 +82,23 @@ static inline uint32_t smccc_get_owner(register_t funcid) #define ARM_SMCCC_OWNER_TRUSTED_OS_END 63 /* List of generic function numbers */ -#define ARM_SMCCC_FUNC_CALL_COUNT 0xFF00 -#define ARM_SMCCC_FUNC_CALL_UID 0xFF01 -#define ARM_SMCCC_FUNC_CALL_REVISION 0xFF03 +#define ARM_SMCCC_FUNC_CALL_COUNT(owner) \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_CONV_32, \ + ARM_SMCCC_OWNER_##owner, \ + 0xFF00) + +#define ARM_SMCCC_FUNC_CALL_UID(owner) \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_CONV_32, \ + ARM_SMCCC_OWNER_##owner, \ + 0xFF01) + +#define ARM_SMCCC_FUNC_CALL_REVISION(owner) \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_CONV_32, \ + ARM_SMCCC_OWNER_##owner, \ + 0xFF03) /* Only one error code defined in SMCCC */ #define ARM_SMCCC_ERR_UNKNOWN_FUNCTION (-1)