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[192.237.175.120]) by mx.google.com with ESMTPS id x88si8196084ioi.194.2018.02.06.07.55.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 06 Feb 2018 07:55:56 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=QPGlpXCs; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1ej5Yt-0003TJ-RJ; Tue, 06 Feb 2018 15:53:35 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1ej5Ys-0003Ss-NB for xen-devel@lists.xen.org; Tue, 06 Feb 2018 15:53:34 +0000 X-Inumbo-ID: d3f626af-0b55-11e8-ba59-bc764e045a96 Received: from mail-wr0-x243.google.com (unknown [2a00:1450:400c:c0c::243]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTPS id d3f626af-0b55-11e8-ba59-bc764e045a96; Tue, 06 Feb 2018 16:53:09 +0100 (CET) Received: by mail-wr0-x243.google.com with SMTP id 41so2449478wrc.9 for ; Tue, 06 Feb 2018 07:53:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=vNw+mkb7UWK/xRLl3S9ahaTtOXMpToN0lrKREbEqsn0=; b=QPGlpXCsx81rjzdTx9OvZo+i7QUB4Hdu73OFGcEM+C6Z7sEdskeBu+rRhMWGxs/Vb8 dga71Ry4dPxGgHDILId3pswY63sxq4At2T6rtGhNKJXcNGBZz9InpszZtmO6WJvAZrZf 5ILlAGynWeS3KGBNRkpRspZCdFBe5NSOkXNV8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=vNw+mkb7UWK/xRLl3S9ahaTtOXMpToN0lrKREbEqsn0=; b=jVwWVL1352HZGHGDrRdm/LMe1Pbrf2Q4MT+RxyrV/vzYUPe1QQtKisbOLx0FY6xrkS Dsz9C7VzZzM6wpZCgTpIY3ffm9RcNLvswiz2WQS5/xlRLfBMLr0nIWqU2e7iw9WZWM2u ht05IaNu/TMLbY7c31aoDflez5yf+1xDhwPNRNEZWWZp5aVHtlVFzukRmiuvca+V3MAa NnAANy3O2NDUsOpUy099J6lW/ZcJbZKH+uhotqGB20py8v04c2hs8tzq9KXHolYdvp8Q Pq3Yej7PO97K0mD1cP8qqpQaCmchZWhzTj/LvGF1VMm8BMQUccO7OubeC2fjQLWJz23g K86Q== X-Gm-Message-State: APf1xPCl72RH849U44P98KdIG+IMWDPJeA7kiYvdUYEsheLU0HS3HIGo GUzjnoxQC406LeyN3e7/H6zwIGjHtoo= X-Received: by 10.223.171.67 with SMTP id r3mr2446613wrc.80.1517932411968; Tue, 06 Feb 2018 07:53:31 -0800 (PST) Received: from e108454-lin.cambridge.arm.com ([2001:41d0:1:6c23::1]) by smtp.gmail.com with ESMTPSA id n20sm14950391wrb.56.2018.02.06.07.53.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 06 Feb 2018 07:53:31 -0800 (PST) From: Julien Grall To: xen-devel@lists.xen.org Date: Tue, 6 Feb 2018 15:53:24 +0000 Message-Id: <20180206155325.11703-3-julien.grall@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206155325.11703-1-julien.grall@linaro.org> References: <20180206155325.11703-1-julien.grall@linaro.org> Cc: sstabellini@kernel.org, volodymyr_babchuk@epam.com, andre.przywara@linaro.org, Julien Grall Subject: [Xen-devel] [PATCH v3 2/3] xen/arm: vsmc: Don't implement function ID that doesn't exist X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" The current implementation of SMCCC relies on the fact only function number (bits [15:0]) is enough to identify what to implement. However, PSCI call are only available in the range 0x84000000-0x8400001F and 0xC4000000-0xC400001F. Furthermore, not all SMC32 functions have equivalent in the SMC64. This is the case of: * PSCI_VERSION * CPU_OFF * MIGRATE_INFO_TYPE * SYSTEM_OFF * SYSTEM_RESET Similarly call count, call uid, revision can only be query using smc32/hvc32 fast calls (See 6.2 in ARM DEN 0028B). Xen should only implement identifier existing in the specification in order to avoid potential clash with later revision. Therefore rework the vsmc code to use the whole function identifier rather than only the function number. At the same time, the new macros for call count, call uid, revision are renamed to better suit the spec. Lastly, update SSSC_SMCCC_FUNCTION_COUNT to match the correct number of funtions. Note that version is not updated because the number has always been wrong, and nobody could properly use it. Signed-off-by: Julien Grall Reviewed-by: Volodymyr Babchuk --- This should be backported to Xen 4.10 as we should not implement functions identifier that does not exist toprevent clash with a later revision. Changes in v3: - Add Volodymyr's reviewed-by Changes in v2: - Rename the call count, call uid, revision macros - Update SSSC_SMCCC_FUNCTION_COUNT --- xen/arch/arm/vsmc.c | 39 ++++++++++++++++++++++----------------- xen/include/asm-arm/smccc.h | 20 +++++++++++++++++--- 2 files changed, 39 insertions(+), 20 deletions(-) diff --git a/xen/arch/arm/vsmc.c b/xen/arch/arm/vsmc.c index 997f2e0ebc..3d8cbcc808 100644 --- a/xen/arch/arm/vsmc.c +++ b/xen/arch/arm/vsmc.c @@ -28,7 +28,7 @@ #define XEN_SMCCC_FUNCTION_COUNT 3 /* Number of functions currently supported by Standard Service Service Calls. */ -#define SSSC_SMCCC_FUNCTION_COUNT 11 +#define SSSC_SMCCC_FUNCTION_COUNT 14 static bool fill_uid(struct cpu_user_regs *regs, xen_uuid_t uuid) { @@ -84,13 +84,15 @@ static bool fill_function_call_count(struct cpu_user_regs *regs, uint32_t cnt) /* SMCCC interface for hypervisor. Tell about itself. */ static bool handle_hypervisor(struct cpu_user_regs *regs) { - switch ( smccc_get_fn(get_user_reg(regs, 0)) ) + uint32_t fid = (uint32_t)get_user_reg(regs, 0); + + switch ( fid ) { - case ARM_SMCCC_FUNC_CALL_COUNT: + case ARM_SMCCC_CALL_COUNT_FID(HYPERVISOR): return fill_function_call_count(regs, XEN_SMCCC_FUNCTION_COUNT); - case ARM_SMCCC_FUNC_CALL_UID: + case ARM_SMCCC_CALL_UID_FID(HYPERVISOR): return fill_uid(regs, XEN_SMCCC_UID); - case ARM_SMCCC_FUNC_CALL_REVISION: + case ARM_SMCCC_REVISION_FID(HYPERVISOR): return fill_revision(regs, XEN_SMCCC_MAJOR_REVISION, XEN_SMCCC_MINOR_REVISION); default: @@ -140,36 +142,37 @@ static bool handle_sssc(struct cpu_user_regs *regs) { uint32_t fid = (uint32_t)get_user_reg(regs, 0); - switch ( smccc_get_fn(fid) ) + switch ( fid ) { - case PSCI_0_2_FN_PSCI_VERSION: + case PSCI_0_2_FN32(PSCI_VERSION): perfc_incr(vpsci_version); PSCI_SET_RESULT(regs, do_psci_0_2_version()); return true; - case PSCI_0_2_FN_CPU_OFF: + case PSCI_0_2_FN32(CPU_OFF): perfc_incr(vpsci_cpu_off); PSCI_SET_RESULT(regs, do_psci_0_2_cpu_off()); return true; - case PSCI_0_2_FN_MIGRATE_INFO_TYPE: + case PSCI_0_2_FN32(MIGRATE_INFO_TYPE): perfc_incr(vpsci_migrate_info_type); PSCI_SET_RESULT(regs, do_psci_0_2_migrate_info_type()); return true; - case PSCI_0_2_FN_SYSTEM_OFF: + case PSCI_0_2_FN32(SYSTEM_OFF): perfc_incr(vpsci_system_off); do_psci_0_2_system_off(); PSCI_SET_RESULT(regs, PSCI_INTERNAL_FAILURE); return true; - case PSCI_0_2_FN_SYSTEM_RESET: + case PSCI_0_2_FN32(SYSTEM_RESET): perfc_incr(vpsci_system_reset); do_psci_0_2_system_reset(); PSCI_SET_RESULT(regs, PSCI_INTERNAL_FAILURE); return true; - case PSCI_0_2_FN_CPU_ON: + case PSCI_0_2_FN32(CPU_ON): + case PSCI_0_2_FN64(CPU_ON): { register_t vcpuid = PSCI_ARG(regs, 1); register_t epoint = PSCI_ARG(regs, 2); @@ -180,7 +183,8 @@ static bool handle_sssc(struct cpu_user_regs *regs) return true; } - case PSCI_0_2_FN_CPU_SUSPEND: + case PSCI_0_2_FN32(CPU_SUSPEND): + case PSCI_0_2_FN64(CPU_SUSPEND): { uint32_t pstate = PSCI_ARG32(regs, 1); register_t epoint = PSCI_ARG(regs, 2); @@ -191,7 +195,8 @@ static bool handle_sssc(struct cpu_user_regs *regs) return true; } - case PSCI_0_2_FN_AFFINITY_INFO: + case PSCI_0_2_FN32(AFFINITY_INFO): + case PSCI_0_2_FN64(AFFINITY_INFO): { register_t taff = PSCI_ARG(regs, 1); uint32_t laff = PSCI_ARG32(regs, 2); @@ -201,13 +206,13 @@ static bool handle_sssc(struct cpu_user_regs *regs) return true; } - case ARM_SMCCC_FUNC_CALL_COUNT: + case ARM_SMCCC_CALL_COUNT_FID(STANDARD): return fill_function_call_count(regs, SSSC_SMCCC_FUNCTION_COUNT); - case ARM_SMCCC_FUNC_CALL_UID: + case ARM_SMCCC_CALL_UID_FID(STANDARD): return fill_uid(regs, SSSC_SMCCC_UID); - case ARM_SMCCC_FUNC_CALL_REVISION: + case ARM_SMCCC_REVISION_FID(STANDARD): return fill_revision(regs, SSSC_SMCCC_MAJOR_REVISION, SSSC_SMCCC_MINOR_REVISION); diff --git a/xen/include/asm-arm/smccc.h b/xen/include/asm-arm/smccc.h index f543dea0bb..62b3a8cdf5 100644 --- a/xen/include/asm-arm/smccc.h +++ b/xen/include/asm-arm/smccc.h @@ -82,9 +82,23 @@ static inline uint32_t smccc_get_owner(register_t funcid) #define ARM_SMCCC_OWNER_TRUSTED_OS_END 63 /* List of generic function numbers */ -#define ARM_SMCCC_FUNC_CALL_COUNT 0xFF00 -#define ARM_SMCCC_FUNC_CALL_UID 0xFF01 -#define ARM_SMCCC_FUNC_CALL_REVISION 0xFF03 +#define ARM_SMCCC_CALL_COUNT_FID(owner) \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_CONV_32, \ + ARM_SMCCC_OWNER_##owner, \ + 0xFF00) + +#define ARM_SMCCC_CALL_UID_FID(owner) \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_CONV_32, \ + ARM_SMCCC_OWNER_##owner, \ + 0xFF01) + +#define ARM_SMCCC_REVISION_FID(owner) \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_CONV_32, \ + ARM_SMCCC_OWNER_##owner, \ + 0xFF03) /* Only one error code defined in SMCCC */ #define ARM_SMCCC_ERR_UNKNOWN_FUNCTION (-1)