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[2001:1868:205::9]) by mx.google.com with ESMTPS id uc10si15761316pbc.165.2014.08.12.04.16.00 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 12 Aug 2014 04:16:00 -0700 (PDT) Received-SPF: none (google.com: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org does not designate permitted sender hosts) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XHA2b-000070-DS; Tue, 12 Aug 2014 11:14:57 +0000 Received: from szxga02-in.huawei.com ([119.145.14.65]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XHA2X-0008NQ-Lx for linux-arm-kernel@lists.infradead.org; Tue, 12 Aug 2014 11:14:55 +0000 Received: from 172.24.2.119 (EHLO szxeml410-hub.china.huawei.com) ([172.24.2.119]) by szxrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id BYA83371; Tue, 12 Aug 2014 19:12:16 +0800 (CST) Received: from [127.0.0.1] (10.177.27.212) by szxeml410-hub.china.huawei.com (10.82.67.137) with Microsoft SMTP Server id 14.3.158.1; Tue, 12 Aug 2014 19:11:58 +0800 Message-ID: <53E9F679.8060302@huawei.com> Date: Tue, 12 Aug 2014 19:11:53 +0800 From: Yijing Wang User-Agent: Mozilla/5.0 (Windows NT 6.1; rv:24.0) Gecko/20100101 Thunderbird/24.0.1 MIME-Version: 1.0 To: David Vrabel , Bjorn Helgaas Subject: Re: [Xen-devel] [RFC PATCH 01/20] x86/xen/MSI: Eliminate arch_msix_mask_irq() and arch_msi_mask_irq() References: <1407828373-24322-1-git-send-email-wangyijing@huawei.com> <1407828373-24322-2-git-send-email-wangyijing@huawei.com> <53E9D9DD.3060901@citrix.com> In-Reply-To: <53E9D9DD.3060901@citrix.com> X-Originating-IP: [10.177.27.212] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140812_041454_250749_1C6923C3 X-CRM114-Status: GOOD ( 13.48 ) X-Spam-Score: -1.4 (-) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-1.4 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [119.145.14.65 listed in list.dnswl.org] -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -0.0 SPF_PASS SPF: sender matches SPF record Cc: linux-mips@linux-mips.org, linux-ia64@vger.kernel.org, linux-pci@vger.kernel.org, Xinwei Hu , "H. Peter Anvin" , sparclinux@vger.kernel.org, linux-s390@vger.kernel.org, Russell King , Joerg Roedel , x86@kernel.org, Sebastian Ott , Benjamin Herrenschmidt , xen-devel@lists.xenproject.org, arnab.basu@freescale.com, Arnd Bergmann , Marc Zyngier , Chris Metcalf , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, Tony Luck , linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, Wuyun , linuxppc-dev@lists.ozlabs.org, "David S. Miller" X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: wangyijing@huawei.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.180 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 On 2014/8/12 17:09, David Vrabel wrote: > On 12/08/14 08:25, Yijing Wang wrote: >> Commit 0e4ccb150 added two __weak arch functions arch_msix_mask_irq() >> and arch_msi_mask_irq() to fix a bug found when running xen in x86. >> Introduced these two funcntions make MSI code complex. This patch >> reverted commit 0e4ccb150 and add #ifdef for x86 msi_chip to fix this >> bug for simplicity. Also this is preparation for using struct >> msi_chip instead of weak arch MSI functions in all platforms. > [...] >> static struct irq_chip msi_chip = { >> .name = "PCI-MSI", >> +#ifdef CONFIG_XEN >> + .irq_unmask = nop_unmask_msi_irq, >> + .irq_mask = nop_mask_msi_irq, >> +#else >> .irq_unmask = unmask_msi_irq, >> .irq_mask = mask_msi_irq, >> +#endif > > No. CONFIG_XEN kernels can run on Xen and bare metal so this must be a > runtime option. Hi David, that's my mistake, what about export struct irq_chip msi_chip, then change the msi_chip->irq_mask/irq_unmask() in xen init functions. Eg. - return 0; } #endif @@ -424,8 +423,8 @@ int __init pci_xen_init(void) x86_msi.setup_msi_irqs = xen_setup_msi_irqs; x86_msi.teardown_msi_irq = xen_teardown_msi_irq; x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs; - x86_msi.msi_mask_irq = xen_nop_msi_mask_irq; - x86_msi.msix_mask_irq = xen_nop_msix_mask_irq; + msi_chip.irq_mask = xen_nop_msi_mask; + msi_chip.irq_unmask = xen_nop_msi_mask; #endif return 0; } @@ -505,8 +504,8 @@ int __init pci_xen_initial_domain(void) x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs; x86_msi.teardown_msi_irq = xen_teardown_msi_irq; x86_msi.restore_msi_irqs = xen_initdom_restore_msi_irqs; - x86_msi.msi_mask_irq = xen_nop_msi_mask_irq; - x86_msi.msix_mask_irq = xen_nop_msix_mask_irq; + msi_chip.irq_mask = xen_nop_msi_mask; + msi_chip.irq_unmask = xen_nop_msi_mask; #endif xen_setup_acpi_sci(); > > David > > . > diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h index 19b0eba..bb6af00 100644 --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -43,6 +43,10 @@ static inline void generic_apic_probe(void) } #endif +#ifdef CONFIG_PCI_MSI +extern struct irq_chip msi_chip; +#endif + #ifdef CONFIG_X86_LOCAL_APIC [...] + +#ifdef CONFIG_PCI_MSI +void xen_nop_msi_mask(struct irq_data *data) {