From patchwork Wed Jun 8 05:57:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivasa Rao Mandadapu X-Patchwork-Id: 579825 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ACE4CC43334 for ; Wed, 8 Jun 2022 05:59:16 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id E9AFC1843; Wed, 8 Jun 2022 07:58:24 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz E9AFC1843 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1654667955; bh=v6KosyoCFmrhyCqvJ+18suVg0EuTIs3/Pf8JZA3UUcI=; h=From:To:Subject:Date:In-Reply-To:References:Cc:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=mZcbSeE4fU4ltP7Ic254vAfTyOG8eMNjXl+4sCKdEn3U3K/GWjJ6Iq6cBKwQiJep/ AxR+4cTavrFujy4jLjwv1Z4KdQeGn7kfbM6n0IolzSQEb2ojtbktowWDqp82OLRiQy zmYXt04xm2Z/grl3lOE8t/cVY8nDWUOrsxr6uocs= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id 37162F8026D; Wed, 8 Jun 2022 07:57:51 +0200 (CEST) Received: by alsa1.perex.cz (Postfix, from userid 50401) id 65871F80526; Wed, 8 Jun 2022 07:57:49 +0200 (CEST) Received: from alexa-out-sd-01.qualcomm.com (alexa-out-sd-01.qualcomm.com [199.106.114.38]) (using TLSv1.2 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id 803FCF80245 for ; Wed, 8 Jun 2022 07:57:40 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 803FCF80245 Authentication-Results: alsa1.perex.cz; dkim=pass (1024-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="zF98fmLu" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1654667863; x=1686203863; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=5rkPqdmhV7ewS1zsGuSZb/biHuI3KnTqJbyZpR2YbNA=; b=zF98fmLuQ+Xbu1t6ZFfsYamEc1H1eL6aH9NYT7JcVunZISS328x4ioWd 0hBXJ/uw8+3raUc76j4lJ+Z2ndNNSK+0F+Fqh9+mJJuuPjVbTFLhzXFPF B+P+JgY3Cf5cqQFWKiJZCKcUGnfGbTrvKFbeZvb8TanWYgSlI5ScGISsA I=; Received: from unknown (HELO ironmsg05-sd.qualcomm.com) ([10.53.140.145]) by alexa-out-sd-01.qualcomm.com with ESMTP; 07 Jun 2022 22:57:37 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg05-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jun 2022 22:57:37 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Tue, 7 Jun 2022 22:57:36 -0700 Received: from hu-srivasam-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Tue, 7 Jun 2022 22:57:30 -0700 From: Srinivasa Rao Mandadapu To: , , , , , , , , , , , , , , , , , Subject: [PATCH v2 2/2] ASoC: qcom: soundwire: Add software clock gating requirement check Date: Wed, 8 Jun 2022 11:27:04 +0530 Message-ID: <1654667824-3760-3-git-send-email-quic_srivasam@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1654667824-3760-1-git-send-email-quic_srivasam@quicinc.com> References: <1654667824-3760-1-git-send-email-quic_srivasam@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) Cc: Srinivasa Rao Mandadapu X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Validate software clock gating required or not and do software clock gating on hclk if soundwire is operational and keep it running by adding flag in private dat structure. This is to avoid conflict between older architectures, where software clock gating is not required and on latest architectues, where software clock gating is mandatory. Signed-off-by: Srinivasa Rao Mandadapu Reviewed-by: Srinivas Kandagatla --- drivers/soundwire/qcom.c | 27 ++++++++++++++++++++------- 1 file changed, 20 insertions(+), 7 deletions(-) diff --git a/drivers/soundwire/qcom.c b/drivers/soundwire/qcom.c index 38c3bf5..930aa93 100644 --- a/drivers/soundwire/qcom.c +++ b/drivers/soundwire/qcom.c @@ -194,6 +194,12 @@ static const struct qcom_swrm_data swrm_v1_5_data = { .default_cols = 16, }; +static const struct qcom_swrm_data swrm_v1_6_data = { + .default_rows = 50, + .default_cols = 16, + .sw_clk_gate_required = 1, +}; + #define to_qcom_sdw(b) container_of(b, struct qcom_swrm_ctrl, bus) static int qcom_swrm_ahb_reg_read(struct qcom_swrm_ctrl *ctrl, int reg, @@ -659,7 +665,8 @@ static int qcom_swrm_init(struct qcom_swrm_ctrl *ctrl) val = FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_BMSK, ctrl->rows_index); val |= FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_BMSK, ctrl->cols_index); - reset_control_reset(ctrl->audio_cgcr); + if (ctrl->audio_cgcr) + reset_control_reset(ctrl->audio_cgcr); ctrl->reg_write(ctrl, SWRM_MCP_FRAME_CTRL_BANK_ADDR(0), val); @@ -1312,6 +1319,15 @@ static int qcom_swrm_probe(struct platform_device *pdev) return PTR_ERR(ctrl->mmio); } + if (data->sw_clk_gate_required) { + ctrl->audio_cgcr = devm_reset_control_get_exclusive(dev, "swr_audio_cgcr"); + if (IS_ERR(ctrl->audio_cgcr)) { + dev_err(dev, "Failed to get cgcr reset ctrl required for SW gating\n"); + ret = PTR_ERR(ctrl->audio_cgcr); + goto err_init; + } + } + ctrl->irq = of_irq_get(dev->of_node, 0); if (ctrl->irq < 0) { ret = ctrl->irq; @@ -1337,10 +1353,6 @@ static int qcom_swrm_probe(struct platform_device *pdev) ctrl->bus.compute_params = &qcom_swrm_compute_params; ctrl->bus.clk_stop_timeout = 300; - ctrl->audio_cgcr = devm_reset_control_get_exclusive(dev, "swr_audio_cgcr"); - if (IS_ERR(ctrl->audio_cgcr)) - dev_err(dev, "Failed to get audio_cgcr reset required for soundwire-v1.6.0\n"); - ret = qcom_swrm_get_port_config(ctrl); if (ret) goto err_clk; @@ -1494,7 +1506,8 @@ static int __maybe_unused swrm_runtime_resume(struct device *dev) qcom_swrm_get_device_status(ctrl); sdw_handle_slave_status(&ctrl->bus, ctrl->status); } else { - reset_control_reset(ctrl->audio_cgcr); + if (ctrl->audio_cgcr) + reset_control_reset(ctrl->audio_cgcr); ctrl->reg_write(ctrl, SWRM_MCP_BUS_CTRL, SWRM_MCP_BUS_CLK_START); ctrl->reg_write(ctrl, SWRM_INTERRUPT_CLEAR, @@ -1559,7 +1572,7 @@ static const struct dev_pm_ops swrm_dev_pm_ops = { static const struct of_device_id qcom_swrm_of_match[] = { { .compatible = "qcom,soundwire-v1.3.0", .data = &swrm_v1_3_data }, { .compatible = "qcom,soundwire-v1.5.1", .data = &swrm_v1_5_data }, - { .compatible = "qcom,soundwire-v1.6.0", .data = &swrm_v1_5_data }, + { .compatible = "qcom,soundwire-v1.6.0", .data = &swrm_v1_6_data }, {/* sentinel */}, };