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Mon, 28 Jun 2021 11:09:14 -0700 (PDT) Received: from localhost ([62.96.65.119]) by smtp.gmail.com with ESMTPSA id n4sm15720917wrw.21.2021.06.28.11.09.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Jun 2021 11:09:13 -0700 (PDT) From: Thierry Reding To: Thierry Reding , Liam Girdwood , Mark Brown Subject: [PATCH 2/2] arm64: tegra: Enable audio IOMMU support on Tegra194 Date: Mon, 28 Jun 2021 20:11:18 +0200 Message-Id: <20210628181118.2295007-3-thierry.reding@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210628181118.2295007-1-thierry.reding@gmail.com> References: <20210628181118.2295007-1-thierry.reding@gmail.com> MIME-Version: 1.0 Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org, Sameer Pujar , Jon Hunter , Rob Herring , linux-tegra@vger.kernel.org X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" From: Thierry Reding Add iommus and interconnects properties to the ADMAIF device tree node on Tegra194. This ensures that the correct SID is used for translation of physical to I/O virtual addresses and that the path to system memory is properly described, which in turn can impact the range of memory that the device can address. Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra194.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi index 1fa503ab390d..b957cb8df927 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi @@ -200,6 +200,10 @@ tegra_admaif: admaif@290f000 { "rx19", "tx19", "rx20", "tx20"; status = "disabled"; + interconnects = <&mc TEGRA194_MEMORY_CLIENT_APEDMAR &emc>, + <&mc TEGRA194_MEMORY_CLIENT_APEDMAW &emc>; + interconnect-names = "dma-mem", "write"; + iommus = <&smmu TEGRA194_SID_APE>; }; tegra_i2s1: i2s@2901000 {