From patchwork Tue Apr 19 16:37:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 564921 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 915E8C433EF for ; Fri, 22 Apr 2022 13:45:01 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id D77F01768; Fri, 22 Apr 2022 15:44:09 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz D77F01768 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1650635099; bh=v2JXUsT+aPSiyV8AWZ0OLtn99RZRKtVDeuty5M4eG68=; h=From:To:Subject:Date:In-Reply-To:References:Cc:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=R9E4TTmFwv1BFf2lpsupZAV1hwl2CORFcUGH6uYxVxEGqJc1j1FZ7jV/3ZpKgzQqL aKUgrMiJSionYSOXwT03SR9P9gJvGiT1VFhPqs7qLdhBS7p6N1SqZi/Sz7eWxRKlpl +BV9hLUk2UFRNmGbEI2xBX0h1VfnUE1I6NoPfnws= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id 194D3F80649; Fri, 22 Apr 2022 15:32:16 +0200 (CEST) Received: by alsa1.perex.cz (Postfix, from userid 50401) id C8173F80116; Tue, 19 Apr 2022 18:43:25 +0200 (CEST) Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id DC1BAF80116 for ; Tue, 19 Apr 2022 18:43:19 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz DC1BAF80116 Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="tt/fiI6J" Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 51700B81BF3; Tue, 19 Apr 2022 16:43:19 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id BED67C385A9; Tue, 19 Apr 2022 16:43:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1650386598; bh=v2JXUsT+aPSiyV8AWZ0OLtn99RZRKtVDeuty5M4eG68=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=tt/fiI6JfMKScsjC4gupDTlXwIFAYWcsYENflWn5n3kMrbCN+Y2cCr3glEwE1sItJ cONsIQQLt01Y/qCAeHUUbJd9TpD27gE/DUc3zMZ7c0U2VwpCWQ+qBf7uwrq/GZGzTX 3FGOj+knk17r2GSyltkagM0yCF+n9LJkDIwNmtctqNly1C9p720AIevLts/VbLM17G O+4nFGEcvsfnWMk8Au/5OQB6coNhg3LP2cgERB8iHAG0NNlBzSNRpU2laCxc90/bD8 8gZIgUWRqfgnaIv2WyLz/01oqgCe1ixn6EBO/7GUMc0aVvmzyH6K1PsZ1Shk5OoOYF /MoVumyBheReg== From: Arnd Bergmann To: robert.jarzmik@free.fr, linux-arm-kernel@lists.infradead.org Subject: [PATCH 34/48] ARM: pxa: pcmcia: move smemc configuration back to arch Date: Tue, 19 Apr 2022 18:37:56 +0200 Message-Id: <20220419163810.2118169-35-arnd@kernel.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20220419163810.2118169-1-arnd@kernel.org> References: <20220419163810.2118169-1-arnd@kernel.org> MIME-Version: 1.0 X-Mailman-Approved-At: Fri, 22 Apr 2022 15:31:42 +0200 Cc: Ulf Hansson , linux-usb@vger.kernel.org, Philipp Zabel , "Rafael J. Wysocki" , Viresh Kumar , Sergey Lapin , linux-fbdev@vger.kernel.org, Dominik Brodowski , linux-kernel@vger.kernel.org, linux-ide@vger.kernel.org, linux-mtd@lists.infradead.org, Tomas Cech , linux-clk@vger.kernel.org, linux-leds@vger.kernel.org, linux-rtc@vger.kernel.org, Helge Deller , Marek Vasut , Paul Parsons , Linus Walleij , Arnd Bergmann , linux-pm@vger.kernel.org, linux-input@vger.kernel.org, Haojian Zhuang , Lubomir Rintel , Mark Brown , dri-devel@lists.freedesktop.org, Thomas Bogendoerfer , Stephen Boyd , patches@opensource.cirrus.com, Dmitry Torokhov , linux-mmc@vger.kernel.org, linux-mips@vger.kernel.org, Michael Turquette , alsa-devel@alsa-project.org, Daniel Mack X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" From: Arnd Bergmann Rather than poking at the smemc registers directly from the pcmcia/pxa2xx_base driver, move those bits into machine file to have a cleaner interface. Cc: Dominik Brodowski Link: https://lore.kernel.org/lkml/87d0egjzxk.fsf@belgarion.home/ Signed-off-by: Arnd Bergmann --- arch/arm/mach-pxa/generic.c | 29 ++++++++++++++++++++++ drivers/pcmcia/pxa2xx_base.c | 46 ++++++++++++----------------------- include/linux/soc/pxa/smemc.h | 10 ++++++++ 3 files changed, 55 insertions(+), 30 deletions(-) create mode 100644 include/linux/soc/pxa/smemc.h diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c index f9083c4f0aea..fe1d55d328e5 100644 --- a/arch/arm/mach-pxa/generic.c +++ b/arch/arm/mach-pxa/generic.c @@ -70,6 +70,35 @@ unsigned int get_clk_frequency_khz(int info) } EXPORT_SYMBOL(get_clk_frequency_khz); +void pxa_smemc_set_pcmcia_timing(int sock, u32 mcmem, u32 mcatt, u32 mcio) +{ + __raw_writel(mcmem, MCMEM(sock)); + __raw_writel(mcatt, MCATT(sock)); + __raw_writel(mcio, MCIO(sock)); +} +EXPORT_SYMBOL_GPL(pxa_smemc_set_pcmcia_timing); + +void pxa_smemc_set_pcmcia_socket(int nr) +{ + switch (nr) { + case 0: + __raw_writel(0, MECR); + break; + case 1: + /* + * We have at least one socket, so set MECR:CIT + * (Card Is There) + */ + __raw_writel(MECR_CIT, MECR); + break; + case 2: + /* Set CIT and MECR:NOS (Number Of Sockets) */ + __raw_writel(MECR_CIT | MECR_NOS, MECR); + break; + } +} +EXPORT_SYMBOL_GPL(pxa_smemc_set_pcmcia_socket); + /* * Intel PXA2xx internal register mapping. * diff --git a/drivers/pcmcia/pxa2xx_base.c b/drivers/pcmcia/pxa2xx_base.c index 7cd1375d6087..0ea41f1411e5 100644 --- a/drivers/pcmcia/pxa2xx_base.c +++ b/drivers/pcmcia/pxa2xx_base.c @@ -24,11 +24,10 @@ #include #include #include +#include -#include #include #include -#include #include #include @@ -113,7 +112,7 @@ static inline u_int pxa2xx_pcmcia_cmd_time(u_int mem_clk_10khz, return (300000 * (pcmcia_mcxx_asst + 1) / mem_clk_10khz); } -static int pxa2xx_pcmcia_set_mcmem( int sock, int speed, int clock ) +static uint32_t pxa2xx_pcmcia_mcmem(int sock, int speed, int clock) { uint32_t val; @@ -124,12 +123,10 @@ static int pxa2xx_pcmcia_set_mcmem( int sock, int speed, int clock ) | ((pxa2xx_mcxx_hold(speed, clock) & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT); - __raw_writel(val, MCMEM(sock)); - - return 0; + return val; } -static int pxa2xx_pcmcia_set_mcio( int sock, int speed, int clock ) +static int pxa2xx_pcmcia_mcio(int sock, int speed, int clock) { uint32_t val; @@ -140,12 +137,11 @@ static int pxa2xx_pcmcia_set_mcio( int sock, int speed, int clock ) | ((pxa2xx_mcxx_hold(speed, clock) & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT); - __raw_writel(val, MCIO(sock)); - return 0; + return val; } -static int pxa2xx_pcmcia_set_mcatt( int sock, int speed, int clock ) +static int pxa2xx_pcmcia_mcatt(int sock, int speed, int clock) { uint32_t val; @@ -156,31 +152,26 @@ static int pxa2xx_pcmcia_set_mcatt( int sock, int speed, int clock ) | ((pxa2xx_mcxx_hold(speed, clock) & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT); - __raw_writel(val, MCATT(sock)); - return 0; + return val; } -static int pxa2xx_pcmcia_set_mcxx(struct soc_pcmcia_socket *skt, unsigned int clk) +static int pxa2xx_pcmcia_set_timing(struct soc_pcmcia_socket *skt) { + unsigned long clk = clk_get_rate(skt->clk) / 10000; struct soc_pcmcia_timing timing; int sock = skt->nr; soc_common_pcmcia_get_timing(skt, &timing); - pxa2xx_pcmcia_set_mcmem(sock, timing.mem, clk); - pxa2xx_pcmcia_set_mcatt(sock, timing.attr, clk); - pxa2xx_pcmcia_set_mcio(sock, timing.io, clk); + pxa_smemc_set_pcmcia_timing(sock, + pxa2xx_pcmcia_mcmem(sock, timing.mem, clk), + pxa2xx_pcmcia_mcatt(sock, timing.attr, clk), + pxa2xx_pcmcia_mcio(sock, timing.io, clk)); return 0; } -static int pxa2xx_pcmcia_set_timing(struct soc_pcmcia_socket *skt) -{ - unsigned long clk = clk_get_rate(skt->clk); - return pxa2xx_pcmcia_set_mcxx(skt, clk / 10000); -} - #ifdef CONFIG_CPU_FREQ static int @@ -215,18 +206,13 @@ pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt, void pxa2xx_configure_sockets(struct device *dev, struct pcmcia_low_level *ops) { - /* - * We have at least one socket, so set MECR:CIT - * (Card Is There) - */ - uint32_t mecr = MECR_CIT; + int nr = 1; - /* Set MECR:NOS (Number Of Sockets) */ if ((ops->first + ops->nr) > 1 || machine_is_viper() || machine_is_arcom_zeus()) - mecr |= MECR_NOS; + nr = 2; - __raw_writel(mecr, MECR); + pxa_smemc_set_pcmcia_socket(nr); } EXPORT_SYMBOL(pxa2xx_configure_sockets); diff --git a/include/linux/soc/pxa/smemc.h b/include/linux/soc/pxa/smemc.h new file mode 100644 index 000000000000..cbf1a2d8af29 --- /dev/null +++ b/include/linux/soc/pxa/smemc.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef __PXA_REGS_H +#define __PXA_REGS_H + +#include + +void pxa_smemc_set_pcmcia_timing(int sock, u32 mcmem, u32 mcatt, u32 mcio); +void pxa_smemc_set_pcmcia_socket(int nr); + +#endif