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Tue, 17 Oct 2023 20:01:59 +0000 Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 39HK1Nok018685 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 17 Oct 2023 20:01:23 GMT Received: from hu-wcheng-lv.qualcomm.com (10.49.16.6) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Tue, 17 Oct 2023 13:01:23 -0700 From: Wesley Cheng To: , , , , , , , , , , , , , , CC: , , , , , Wesley Cheng Subject: [PATCH v9 15/34] dt-bindings: usb: dwc3: Limit num-hc-interrupters definition Date: Tue, 17 Oct 2023 13:00:50 -0700 Message-ID: <20231017200109.11407-16-quic_wcheng@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20231017200109.11407-1-quic_wcheng@quicinc.com> References: <20231017200109.11407-1-quic_wcheng@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.49.16.6] X-ClientProxiedBy: nalasex01a.na.qualcomm.com (10.47.209.196) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: dxktlNWDCc-ySHGBfddTkgpBXagXl4Hh X-Proofpoint-GUID: dxktlNWDCc-ySHGBfddTkgpBXagXl4Hh X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-17_03,2023-10-17_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 adultscore=0 priorityscore=1501 phishscore=0 malwarescore=0 spamscore=0 mlxscore=0 bulkscore=0 impostorscore=0 suspectscore=0 mlxlogscore=730 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2310170170 Message-ID-Hash: JJ2NR74YJRH2PK5Y2GD6ER2ICTTZQDCM X-Message-ID-Hash: JJ2NR74YJRH2PK5Y2GD6ER2ICTTZQDCM X-MailFrom: quic_wcheng@quicinc.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: Ensure that the number of XHCI secondary interrupters defined for a DWC3 based implementation is limited to 8. XHCI in general can potentially support up to 1024 interrupters. Reviewed-by: Rob Herring Signed-off-by: Wesley Cheng --- Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml index d81c2e849ca9..3e9141e8a005 100644 --- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml @@ -433,6 +433,10 @@ properties: items: enum: [1, 4, 8, 16, 32, 64, 128, 256] + num-hc-interrupters: + maximum: 8 + default: 1 + port: $ref: /schemas/graph.yaml#/properties/port description: