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[83.8.128.191]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a626cda46e1sm251842566b.196.2024.05.25.06.28.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 25 May 2024 06:28:16 -0700 (PDT) From: Artur Weber Date: Sat, 25 May 2024 15:28:12 +0200 Subject: [PATCH v4 8/9] ARM: dts: samsung: exynos4212-tab3: Add MCLK2 clock to WM1811 codec config MIME-Version: 1.0 Message-Id: <20240525-midas-wm1811-gpio-jack-v4-8-f488e03bd8c7@gmail.com> References: <20240525-midas-wm1811-gpio-jack-v4-0-f488e03bd8c7@gmail.com> In-Reply-To: <20240525-midas-wm1811-gpio-jack-v4-0-f488e03bd8c7@gmail.com> To: Sylwester Nawrocki , Krzysztof Kozlowski Cc: Liam Girdwood , Mark Brown , Rob Herring , Conor Dooley , Jaroslav Kysela , Takashi Iwai , Alim Akhtar , alsa-devel@alsa-project.org, linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Artur Weber X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1716643685; l=1280; i=aweber.kernel@gmail.com; s=20231030; h=from:subject:message-id; bh=9NhvL8rRJ4NpIlfmWPhGyv2x7+JR1l7yy4pYIQI11b4=; b=C0ynPtHNYmis/xfQ/wB1ZfG8JHLYQUqSEjR4rYX7GYbMQmbw4YCAxg/2J5P30kp+52wjTF7+8 rsbM/TdIWdzB7cRXlBvMytyyjCrEOlBBw5psPJJ9C8szKVM66+8pWU4 X-Developer-Key: i=aweber.kernel@gmail.com; a=ed25519; pk=RhDBfWbJEHqDibXbhNEBAnc9FMkyznGxX/hwfhL8bv8= X-MailFrom: aweber.kernel@gmail.com X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1 Message-ID-Hash: JWGOKO44LSDRZGBHF477JEUXVICQAKXS X-Message-ID-Hash: JWGOKO44LSDRZGBHF477JEUXVICQAKXS X-Mailman-Approved-At: Thu, 13 Jun 2024 15:51:03 +0000 X-Mailman-Version: 3.3.9 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: In the schematics, the MCLK2 pin is shown as connected to CODEC_CLK32K, which is derived from the same 32KHZ_PMIC clock as Bluetooth/WiFi and GPS clocks. 32KHZ_PMIC is connected to the BTCLK pin, represented in mainline as S2MPS11_CLK_BT. Add the MCLK2 clock to the WM1811 codec clock property to properly describe the hardware. Signed-off-by: Artur Weber --- Changes in v3: - Split out from "[PATCH v2 7/7] ARM: dts: samsung: exynos4212-tab3: Fix up wm1811 codec config" --- arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi b/arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi index 8dc81112172c..47e9a230f2e8 100644 --- a/arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi +++ b/arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi @@ -529,8 +529,9 @@ &i2c_4 { wm1811: audio-codec@1a { compatible = "wlf,wm1811"; reg = <0x1a>; - clocks = <&pmu_system_controller 0>; - clock-names = "MCLK1"; + clocks = <&pmu_system_controller 0>, + <&s5m8767_osc S2MPS11_CLK_BT>; + clock-names = "MCLK1", "MCLK2"; interrupt-controller; #interrupt-cells = <2>; interrupt-parent = <&gpx3>;