From patchwork Wed Jun 22 15:28:15 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Brown X-Patchwork-Id: 104854 Delivered-To: patch@linaro.org Received: by 10.140.28.4 with SMTP id 4csp59385qgy; Wed, 22 Jun 2016 11:58:11 -0700 (PDT) X-Received: by 10.194.22.169 with SMTP id e9mr26361203wjf.128.1466621891622; Wed, 22 Jun 2016 11:58:11 -0700 (PDT) Return-Path: Received: from alsa0.perex.cz (alsa0.perex.cz. [77.48.224.243]) by mx.google.com with ESMTP id v1si1138965wjp.17.2016.06.22.11.58.11; Wed, 22 Jun 2016 11:58:11 -0700 (PDT) Received-SPF: neutral (google.com: 77.48.224.243 is neither permitted nor denied by best guess record for domain of alsa-devel-bounces@alsa-project.org) client-ip=77.48.224.243; Authentication-Results: mx.google.com; spf=neutral (google.com: 77.48.224.243 is neither permitted nor denied by best guess record for domain of alsa-devel-bounces@alsa-project.org) smtp.mailfrom=alsa-devel-bounces@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id A2223265D1C; Wed, 22 Jun 2016 20:58:10 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.2.4 (2008-01-01) on mail1.perex.cz X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=disabled version=3.2.4 Received: from alsa0.perex.cz (localhost [127.0.0.1]) by alsa0.perex.cz (Postfix) with ESMTP id 520CB265DC5; Wed, 22 Jun 2016 20:41:19 +0200 (CEST) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id DF718265945; Wed, 22 Jun 2016 20:41:16 +0200 (CEST) Received: from mezzanine.sirena.org.uk (mezzanine.sirena.org.uk [106.187.55.193]) by alsa0.perex.cz (Postfix) with ESMTP id 2CFB3266CF7 for ; Wed, 22 Jun 2016 17:28:22 +0200 (CEST) Received: from debutante.sirena.org.uk ([2a01:348:6:8808:fab::3] helo=debutante) by mezzanine.sirena.org.uk with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.84_2) (envelope-from ) id 1bFk4g-00064O-AT; Wed, 22 Jun 2016 15:28:19 +0000 Received: from broonie by debutante with local (Exim 4.87) (envelope-from ) id 1bFk4d-0002Bo-9q; Wed, 22 Jun 2016 16:28:15 +0100 From: Mark Brown To: Jayachandran B In-Reply-To: <1466431812-9046-3-git-send-email-vinod.koul@intel.com> Message-Id: Date: Wed, 22 Jun 2016 16:28:15 +0100 X-SA-Exim-Connect-IP: 2a01:348:6:8808:fab::3 X-SA-Exim-Mail-From: broonie@sirena.org.uk X-SA-Exim-Version: 4.2.1 (built Mon, 26 Dec 2011 16:24:06 +0000) X-SA-Exim-Scanned: Yes (on mezzanine.sirena.org.uk) Cc: Vinod Koul , liam.r.girdwood@linux.intel.com, alsa-devel@alsa-project.org, broonie@kernel.org, patches.audio@intel.com Subject: [alsa-devel] Applied "ASoC: Intel: Skylake: Support multi-core in Skylake" to the asoc tree X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org The patch ASoC: Intel: Skylake: Support multi-core in Skylake has been applied to the asoc tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 40a166039a84da15a6d01a7a997398eb4a0d3c1e Mon Sep 17 00:00:00 2001 From: Jayachandran B Date: Tue, 21 Jun 2016 10:17:42 +0530 Subject: [PATCH] ASoC: Intel: Skylake: Support multi-core in Skylake Add multicore DSP support in Skylake DSP operations. Signed-off-by: Jayachandran B Signed-off-by: Vinod Koul Signed-off-by: Mark Brown --- sound/soc/intel/skylake/skl-sst.c | 77 ++++++++++++++++++++++++--------------- 1 file changed, 48 insertions(+), 29 deletions(-) -- 2.8.1 _______________________________________________ Alsa-devel mailing list Alsa-devel@alsa-project.org http://mailman.alsa-project.org/mailman/listinfo/alsa-devel diff --git a/sound/soc/intel/skylake/skl-sst.c b/sound/soc/intel/skylake/skl-sst.c index ecaca94d2a96..588f899ceb65 100644 --- a/sound/soc/intel/skylake/skl-sst.c +++ b/sound/soc/intel/skylake/skl-sst.c @@ -150,7 +150,6 @@ static int skl_load_base_firmware(struct sst_dsp *ctx) } dev_dbg(ctx->dev, "Download firmware successful%d\n", ret); - skl_dsp_set_state_locked(ctx, SKL_DSP_RUNNING); skl->fw_loaded = true; } return 0; @@ -166,14 +165,41 @@ skl_load_base_firmware_failed: static int skl_set_dsp_D0(struct sst_dsp *ctx, unsigned int core_id) { int ret; + struct skl_ipc_dxstate_info dx; + struct skl_sst *skl = ctx->thread_context; + unsigned int core_mask = SKL_DSP_CORE_MASK(core_id); - ret = skl_load_base_firmware(ctx); - if (ret < 0) { - dev_err(ctx->dev, "unable to load firmware\n"); - return ret; + /* If core0 is being turned on, we need to load the FW */ + if (core_id == SKL_DSP_CORE0_ID) { + ret = skl_load_base_firmware(ctx); + if (ret < 0) { + dev_err(ctx->dev, "unable to load firmware\n"); + return ret; + } + } + + /* + * If any core other than core 0 is being moved to D0, enable the + * core and send the set dx IPC for the core. + */ + if (core_id != SKL_DSP_CORE0_ID) { + ret = skl_dsp_enable_core(ctx, core_mask); + if (ret < 0) + return ret; + + dx.core_mask = core_mask; + dx.dx_mask = core_mask; + + ret = skl_ipc_set_dx(&skl->ipc, SKL_INSTANCE_ID, + SKL_BASE_FW_MODULE_ID, &dx); + if (ret < 0) { + dev_err(ctx->dev, "Failed to set dsp to D0:core id= %d\n", + core_id); + skl_dsp_disable_core(ctx, core_mask); + } } - skl_dsp_set_state_locked(ctx, SKL_DSP_RUNNING); + skl->cores.state[core_id] = SKL_DSP_RUNNING; return ret; } @@ -183,35 +209,28 @@ static int skl_set_dsp_D3(struct sst_dsp *ctx, unsigned int core_id) int ret; struct skl_ipc_dxstate_info dx; struct skl_sst *skl = ctx->thread_context; + unsigned int core_mask = SKL_DSP_CORE_MASK(core_id); - dev_dbg(ctx->dev, "In %s:\n", __func__); - mutex_lock(&ctx->mutex); - if (!is_skl_dsp_running(ctx)) { - mutex_unlock(&ctx->mutex); - return 0; - } - mutex_unlock(&ctx->mutex); - - dx.core_mask = SKL_DSP_CORE0_MASK; + dx.core_mask = core_mask; dx.dx_mask = SKL_IPC_D3_MASK; + ret = skl_ipc_set_dx(&skl->ipc, SKL_INSTANCE_ID, SKL_BASE_FW_MODULE_ID, &dx); if (ret < 0) - dev_err(ctx->dev, - "D3 request to FW failed, continuing reset: %d", ret); - - /* disable Interrupt */ - ctx->cl_dev.ops.cl_cleanup_controller(ctx); - skl_cldma_int_disable(ctx); - skl_ipc_op_int_disable(ctx); - skl_ipc_int_disable(ctx); - - ret = skl_dsp_disable_core(ctx, core_id); - if (ret < 0) { - dev_err(ctx->dev, "disable dsp core failed ret: %d\n", ret); - ret = -EIO; + dev_err(ctx->dev, "set Dx core %d fail: %d\n", core_id, ret); + + if (core_id == SKL_DSP_CORE0_ID) { + /* disable Interrupt */ + ctx->cl_dev.ops.cl_cleanup_controller(ctx); + skl_cldma_int_disable(ctx); + skl_ipc_op_int_disable(ctx); + skl_ipc_int_disable(ctx); } - skl_dsp_set_state_locked(ctx, SKL_DSP_RESET); + ret = skl_dsp_disable_core(ctx, core_mask); + if (ret < 0) + return ret; + + skl->cores.state[core_id] = SKL_DSP_RESET; return ret; }