From patchwork Mon Feb 19 16:57:32 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Brown X-Patchwork-Id: 128827 Delivered-To: patch@linaro.org Received: by 10.46.124.24 with SMTP id x24csp3719067ljc; Mon, 19 Feb 2018 08:58:06 -0800 (PST) X-Google-Smtp-Source: AH8x224I8GRhYcjXBt+FmIDNY9+mmSyTpbPtljcjNVYU6h/L3dh7y7hU5uSwz4aIPbJFll/vU2Ff X-Received: by 10.28.196.200 with SMTP id u191mr11800013wmf.17.1519059486679; Mon, 19 Feb 2018 08:58:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519059486; cv=none; d=google.com; s=arc-20160816; b=DdQBLDqGMYIdihUy9Szk5fHZBo09MBKfguOTYVctLKJrlNnbXdtdr6lRWSCz0Ay4C9 6ybukJi6I2XO00V+3Z5TiVO7rHa641nUlbxoHJFu0IWdXeKxF8gM35b/32NWAjWHE9wi 2nI+pR8oGEwkxKs6Kg4xUWRYezFomLasBYOW0fqtuRlPLDtJlpc10nwoncg+q+0AhAKP didXgCroI1Qqm2tdmdL+XR44rwH61mX2tbfdaoY5dyM+qtZ4Mgn5JMV0dOPgjG0d//vq /QX96zjNHkqbV38WCuD8RbDUAxb7suILulMKEpuAdPkUigUqmWdETFUKeJ9QZjCzLnpz g1+Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:date:message-id:in-reply-to:to:from :dkim-signature:delivered-to:arc-authentication-results; bh=lPwYpdaPh0Ne4UOEOiSA7WSJRlDPoTAjwUjr1M2Niok=; b=Uhtb6x2G3DXwI2DoWchAAISKM9x5awkn7bHZ18IMO2L6wRy7w4GeIJQWtdfb2RsOiZ Ry4wD0j3/PGXqOsgQZ4KdaGV8dpEtQmU8VBJTQcZ0EZ3oWqhOKxLuXx29NF2SxyNWXby VsOPG63vPx/tec+ESN+WtZbkdWugcoDg5F5t1UIE+C2wFqtvRKeQ4g63Wfxa3x4uLea5 n+sc7X+bkSgQhYcfvGob1PoA4/5lCRtVPpKfWlbNZUoEwy7tC8KROiEfKh5ISCyrFH/B DgtehaOaow0fyF8+t+LBisKzPfP1wh1nD7EfS6yZGSCyjY0uPpdpZ1NHsiFoZ/4IFHdf K76Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@sirena.org.uk header.s=20170815-heliosphere header.b=P5/AuSEI; spf=pass (google.com: domain of alsa-devel-bounces@alsa-project.org designates 77.48.224.243 as permitted sender) smtp.mailfrom=alsa-devel-bounces@alsa-project.org Return-Path: Received: from alsa0.perex.cz (alsa0.perex.cz. [77.48.224.243]) by mx.google.com with ESMTP id m197si7990631wma.5.2018.02.19.08.58.03; Mon, 19 Feb 2018 08:58:06 -0800 (PST) Received-SPF: pass (google.com: domain of alsa-devel-bounces@alsa-project.org designates 77.48.224.243 as permitted sender) client-ip=77.48.224.243; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@sirena.org.uk header.s=20170815-heliosphere header.b=P5/AuSEI; spf=pass (google.com: domain of alsa-devel-bounces@alsa-project.org designates 77.48.224.243 as permitted sender) smtp.mailfrom=alsa-devel-bounces@alsa-project.org Received: from alsa0.perex.cz (localhost [127.0.0.1]) by alsa0.perex.cz (Postfix) with ESMTP id EDF12267439; Mon, 19 Feb 2018 17:57:50 +0100 (CET) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id C7BF7267441; Mon, 19 Feb 2018 17:57:41 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail1.perex.cz X-Spam-Level: * X-Spam-Status: No, score=1.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, PRX_BODY_30, SPF_PASS, T_RP_MATCHES_RCVD autolearn=disabled version=3.4.0 Received: from heliosphere.sirena.org.uk (heliosphere.sirena.org.uk [172.104.155.198]) by alsa0.perex.cz (Postfix) with ESMTP id 01362267440 for ; Mon, 19 Feb 2018 17:57:37 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sirena.org.uk; s=20170815-heliosphere; h=Date:Message-Id:In-Reply-To: Subject:Cc:To:From:Sender:Reply-To:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:References: List-Id:List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner: List-Archive; bh=bd6fe5KBdlSh1P99f8S+a5YmtMUQzYoznt4380T8Lho=; b=P5/AuSEIkSJ8 X2nkT9cCJV3F1UmlErX9iqdOxUhqgukV09FC2fvFz1tRinvwQPxH/JVWKJao42Ga3+mpJah90TgrD nsP4mMENzqhVuQp26sKxSvujpnEE9fYU7zzqqyJe01ByYGU8PXhEF8oi7nR9bmYPavspyTIvtrveX Xd7R4=; Received: from debutante.sirena.org.uk ([2001:470:1f1d:6b5::3] helo=debutante) by heliosphere.sirena.org.uk with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1enoku-0003sP-Vs; Mon, 19 Feb 2018 16:57:33 +0000 Received: from broonie by debutante with local (Exim 4.90_1) (envelope-from ) id 1enoku-0002GM-Gs; Mon, 19 Feb 2018 16:57:32 +0000 From: Mark Brown To: Mukunda@sirena.org.uk, Vijendar In-Reply-To: <1518766434-7911-2-git-send-email-Vijendar.Mukunda@amd.com> Message-Id: Date: Mon, 19 Feb 2018 16:57:32 +0000 Cc: alsa-devel@alsa-project.org, tiwai@suse.de, lgirdwood@gmail.com, broonie@kernel.org, Vijendar Mukunda , Alexander.Deucher@amd.com Subject: [alsa-devel] Applied "ASoC: amd: renaming pcm substream names and bytescount params" to the asoc tree X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org The patch ASoC: amd: renaming pcm substream names and bytescount params has been applied to the asoc tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From e21358c43b426301aefef27c498eee2e2525b3ce Mon Sep 17 00:00:00 2001 From: "Mukunda, Vijendar" Date: Fri, 16 Feb 2018 13:03:46 +0530 Subject: [PATCH] ASoC: amd: renaming pcm substream names and bytescount params With in ACP, There are three I2S controllers can be configured. (I2S SP ,I2S MICSP and I2S BT).These controllers can support both playback/capture scenarios. Default enabled i2s controller instance is i2s sp instance. Renamed stream names and bytescount params as i2ssp. These changes required to distinguish with other I2S controller instance pcm substreams and bytescount params. Signed-off-by: Vijendar Mukunda Reviewed-by: Alex Deucher Signed-off-by: Mark Brown --- sound/soc/amd/acp-pcm-dma.c | 49 +++++++++++++++++++++++---------------------- sound/soc/amd/acp.h | 8 ++++---- 2 files changed, 29 insertions(+), 28 deletions(-) -- 2.16.1 _______________________________________________ Alsa-devel mailing list Alsa-devel@alsa-project.org http://mailman.alsa-project.org/mailman/listinfo/alsa-devel diff --git a/sound/soc/amd/acp-pcm-dma.c b/sound/soc/amd/acp-pcm-dma.c index c33a512283a4..3c39a0d8125d 100644 --- a/sound/soc/amd/acp-pcm-dma.c +++ b/sound/soc/amd/acp-pcm-dma.c @@ -662,7 +662,7 @@ static irqreturn_t dma_irq_handler(int irq, void *arg) 1, 0); acp_dma_start(acp_mmio, SYSRAM_TO_ACP_CH_NUM, false); - snd_pcm_period_elapsed(irq_data->play_stream); + snd_pcm_period_elapsed(irq_data->play_i2ssp_stream); acp_reg_write((intr_flag & BIT(ACP_TO_I2S_DMA_CH_NUM)) << 16, acp_mmio, mmACP_EXTERNAL_INTR_STAT); @@ -685,7 +685,7 @@ static irqreturn_t dma_irq_handler(int irq, void *arg) if ((intr_flag & BIT(ACP_TO_SYSRAM_CH_NUM)) != 0) { valid_irq = true; - snd_pcm_period_elapsed(irq_data->capture_stream); + snd_pcm_period_elapsed(irq_data->capture_i2ssp_stream); acp_reg_write((intr_flag & BIT(ACP_TO_SYSRAM_CH_NUM)) << 16, acp_mmio, mmACP_EXTERNAL_INTR_STAT); } @@ -743,11 +743,11 @@ static int acp_dma_open(struct snd_pcm_substream *substream) * This enablement is not required for another stream, if current * stream is not closed */ - if (!intr_data->play_stream && !intr_data->capture_stream) + if (!intr_data->play_i2ssp_stream && !intr_data->capture_i2ssp_stream) acp_reg_write(1, adata->acp_mmio, mmACP_EXTERNAL_INTR_ENB); if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { - intr_data->play_stream = substream; + intr_data->play_i2ssp_stream = substream; /* For Stoney, Memory gating is disabled,i.e SRAM Banks * won't be turned off. The default state for SRAM banks is ON. * Setting SRAM bank state code skipped for STONEY platform. @@ -758,7 +758,7 @@ static int acp_dma_open(struct snd_pcm_substream *substream) bank, true); } } else { - intr_data->capture_stream = substream; + intr_data->capture_i2ssp_stream = substream; if (intr_data->asic_type != CHIP_STONEY) { for (bank = 5; bank <= 8; bank++) acp_set_sram_bank_state(intr_data->acp_mmio, @@ -857,11 +857,11 @@ static snd_pcm_uframes_t acp_dma_pointer(struct snd_pcm_substream *substream) bytescount = acp_get_byte_count(rtd->acp_mmio, substream->stream); if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { - if (bytescount > rtd->renderbytescount) - bytescount = bytescount - rtd->renderbytescount; + if (bytescount > rtd->i2ssp_renderbytescount) + bytescount = bytescount - rtd->i2ssp_renderbytescount; } else { - if (bytescount > rtd->capturebytescount) - bytescount = bytescount - rtd->capturebytescount; + if (bytescount > rtd->i2ssp_capturebytescount) + bytescount = bytescount - rtd->i2ssp_capturebytescount; } pos = do_div(bytescount, buffersize); return bytes_to_frames(runtime, pos); @@ -917,8 +917,8 @@ static int acp_dma_trigger(struct snd_pcm_substream *substream, int cmd) bytescount = acp_get_byte_count(rtd->acp_mmio, substream->stream); if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { - if (rtd->renderbytescount == 0) - rtd->renderbytescount = bytescount; + if (rtd->i2ssp_renderbytescount == 0) + rtd->i2ssp_renderbytescount = bytescount; acp_dma_start(rtd->acp_mmio, SYSRAM_TO_ACP_CH_NUM, false); while (acp_reg_read(rtd->acp_mmio, mmACP_DMA_CH_STS) & @@ -935,8 +935,8 @@ static int acp_dma_trigger(struct snd_pcm_substream *substream, int cmd) ACP_TO_I2S_DMA_CH_NUM, true); } else { - if (rtd->capturebytescount == 0) - rtd->capturebytescount = bytescount; + if (rtd->i2ssp_capturebytescount == 0) + rtd->i2ssp_capturebytescount = bytescount; acp_dma_start(rtd->acp_mmio, I2S_TO_ACP_DMA_CH_NUM, true); } @@ -953,11 +953,11 @@ static int acp_dma_trigger(struct snd_pcm_substream *substream, int cmd) if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { ret = acp_dma_stop(rtd->acp_mmio, ACP_TO_I2S_DMA_CH_NUM); - rtd->renderbytescount = 0; + rtd->i2ssp_renderbytescount = 0; } else { ret = acp_dma_stop(rtd->acp_mmio, I2S_TO_ACP_DMA_CH_NUM); - rtd->capturebytescount = 0; + rtd->i2ssp_capturebytescount = 0; } break; default: @@ -1003,7 +1003,7 @@ static int acp_dma_close(struct snd_pcm_substream *substream) kfree(rtd); if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { - adata->play_stream = NULL; + adata->play_i2ssp_stream = NULL; /* For Stoney, Memory gating is disabled,i.e SRAM Banks * won't be turned off. The default state for SRAM banks is ON. * Setting SRAM bank state code skipped for STONEY platform. @@ -1015,7 +1015,7 @@ static int acp_dma_close(struct snd_pcm_substream *substream) false); } } else { - adata->capture_stream = NULL; + adata->capture_i2ssp_stream = NULL; if (adata->asic_type != CHIP_STONEY) { for (bank = 5; bank <= 8; bank++) acp_set_sram_bank_state(adata->acp_mmio, bank, @@ -1026,7 +1026,7 @@ static int acp_dma_close(struct snd_pcm_substream *substream) /* Disable ACP irq, when the current stream is being closed and * another stream is also not active. */ - if (!adata->play_stream && !adata->capture_stream) + if (!adata->play_i2ssp_stream && !adata->capture_i2ssp_stream) acp_reg_write(0, adata->acp_mmio, mmACP_EXTERNAL_INTR_ENB); return 0; @@ -1076,8 +1076,9 @@ static int acp_audio_probe(struct platform_device *pdev) * and device doesn't generate any interrupts. */ - audio_drv_data->play_stream = NULL; - audio_drv_data->capture_stream = NULL; + audio_drv_data->play_i2ssp_stream = NULL; + audio_drv_data->capture_i2ssp_stream = NULL; + audio_drv_data->asic_type = *pdata; res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); @@ -1141,7 +1142,7 @@ static int acp_pcm_resume(struct device *dev) return status; } - if (adata->play_stream && adata->play_stream->runtime) { + if (adata->play_i2ssp_stream && adata->play_i2ssp_stream->runtime) { /* For Stoney, Memory gating is disabled,i.e SRAM Banks * won't be turned off. The default state for SRAM banks is ON. * Setting SRAM bank state code skipped for STONEY platform. @@ -1152,17 +1153,17 @@ static int acp_pcm_resume(struct device *dev) true); } config_acp_dma(adata->acp_mmio, - adata->play_stream->runtime->private_data, + adata->play_i2ssp_stream->runtime->private_data, adata->asic_type); } - if (adata->capture_stream && adata->capture_stream->runtime) { + if (adata->capture_i2ssp_stream && adata->capture_i2ssp_stream->runtime) { if (adata->asic_type != CHIP_STONEY) { for (bank = 5; bank <= 8; bank++) acp_set_sram_bank_state(adata->acp_mmio, bank, true); } config_acp_dma(adata->acp_mmio, - adata->capture_stream->runtime->private_data, + adata->capture_i2ssp_stream->runtime->private_data, adata->asic_type); } acp_reg_write(1, adata->acp_mmio, mmACP_EXTERNAL_INTR_ENB); diff --git a/sound/soc/amd/acp.h b/sound/soc/amd/acp.h index ecb458935d1e..27803b26fc35 100644 --- a/sound/soc/amd/acp.h +++ b/sound/soc/amd/acp.h @@ -84,14 +84,14 @@ struct audio_substream_data { u16 num_of_pages; u16 direction; uint64_t size; - u64 renderbytescount; - u64 capturebytescount; + u64 i2ssp_renderbytescount; + u64 i2ssp_capturebytescount; void __iomem *acp_mmio; }; struct audio_drv_data { - struct snd_pcm_substream *play_stream; - struct snd_pcm_substream *capture_stream; + struct snd_pcm_substream *play_i2ssp_stream; + struct snd_pcm_substream *capture_i2ssp_stream; void __iomem *acp_mmio; u32 asic_type; };