Show patches with: Submitter = Xueliang Zhong       |   42 patches
Patch Series S/W/F Date Submitter Delegate State
Revert "Remove core.art image" --- 2020-06-10 Xueliang Zhong Rejected
VIXL simulator for ART (Stage1) --- 2019-11-27 Xueliang Zhong Accepted
[DO NOT MERGE] Measure FP16.toFloat() performance --- 2019-08-21 Xueliang Zhong New
Quiet SNaN inputs in Half.toFloat() --- 2018-12-14 Xueliang Zhong Accepted
Move Half implementations to libcore to allow ART optimizations --- 2018-12-10 Xueliang Zhong Accepted
Move Half implementations to libcore to allow ART optimizations --- 2018-12-10 Xueliang Zhong Accepted
ARM64: toFloat() intrinsics with ARMv8 FP16. --- 2018-12-10 Xueliang Zhong Accepted
Revert^2 "Merge remote-tracking branch 'remotes/aosp/upstream-master'" --- 2018-10-25 Xueliang Zhong Accepted
Revert^2 "ART: Fix breaking changes from recent VIXL update." --- 2018-10-25 Xueliang Zhong Accepted
Merge remote-tracking branch 'remotes/aosp/upstream-master' into VIXLUpdate --- 2018-10-01 Xueliang Zhong Rejected
Merge remote-tracking branch 'remotes/aosp/upstream-master' --- 2018-10-01 Xueliang Zhong Accepted
ART: Fix breaking changes from recent VIXL update. --- 2018-10-01 Xueliang Zhong Accepted
ART: Add support for ARMv8.x features for ARM64. --- 2018-09-24 Xueliang Zhong Accepted
Revert^2 "ARM: Use r4 for stack overflow check to reduce code size." --- 2018-01-31 Xueliang Zhong Accepted
DO NOT SUBMIT: 16 byte alignment of objects but keep data offset. --- 2017-12-05 Xueliang Zhong New
[DO NOT MERGE] Debug a failure when LSE removes ConstructorFence. --- 2017-11-15 Xueliang Zhong Rejected
Fix LSA hunt for original reference bug. --- 2017-10-26 Xueliang Zhong Accepted
Support VecLoad and VecStore in LSE. --- 2017-09-29 Xueliang Zhong Accepted
Support VecLoad and VecStore in LSA. --- 2017-09-29 Xueliang Zhong Accepted
HRem support in BCE. --- 2017-07-28 Xueliang Zhong Accepted
Improve SchedulingLatencyVisitorARM on HCondition latency settings. --- 2017-06-30 Xueliang Zhong Accepted
Disambiguate memory accesses in instruction scheduling --- 2017-06-02 Xueliang Zhong Accepted
Fix build failure in scheduler_arm with ART_USE_OLD_ARM_BACKEND=1 --- 2017-06-02 Xueliang Zhong Accepted
Improve array index analysis in LSA. --- 2017-05-30 Xueliang Zhong Accepted
Create load store analysis pass --- 2017-05-10 Xueliang Zhong Accepted
Instruction scheduling for ARM. --- 2017-04-25 Xueliang Zhong Accepted
Math.round float intrinsic for ARM. --- 2017-02-28 Xueliang Zhong Accepted
Avoid intrinsify System.arraycopy for AOT compiled APP code. --- 2017-02-13 Xueliang Zhong Rejected
Add comments in VisitSuspendCheck in Codegen --- 2017-02-07 Xueliang Zhong New
Math.min and Math.max intrinsics for ARM --- 2017-02-01 Xueliang Zhong Rejected
Math.min and Math.max intrinsics for ARM --- 2017-01-31 Xueliang Zhong Accepted
Implement Math.rint Intrinsic for ARM32. --- 2017-01-31 Xueliang Zhong Accepted
Fix perf-inject jit profiling for osr method. --- 2017-01-11 Xueliang Zhong Accepted
Don't enable scheduler. --- 2016-12-22 Xueliang Zhong Rejected
ARM: VIXL32: Implement HClassTableGet Visitor. --- 2016-11-24 Xueliang Zhong Accepted
ARM: VIXL32: Improve codegen on CBZ/CBNZ --- 2016-11-23 Xueliang Zhong Accepted
ART jitted code profiling support. --- 2016-10-19 Xueliang Zhong Accepted
Integer.bitCount and Long.bitCount intrinsics for ARM --- 2016-07-08 Xueliang Zhong Accepted
Math Round Intrinsic Implementations For Java8. --- 2016-06-28 Xueliang Zhong Accepted
ARM assembler support for VCNT and VPADDL. --- 2016-06-13 Xueliang Zhong Accepted
Integer.bitCount and Long.bitCount intrinsics for ARM --- 2016-04-25 Xueliang Zhong Accepted
Integer.bitCount and Long.bitCount intrinsics for ARM64 --- 2016-03-03 Xueliang Zhong Accepted