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[81.108.156.85]) by mx.google.com with ESMTPSA id fh8sm353148bkc.10.2013.04.24.02.28.32 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Wed, 24 Apr 2013 02:28:33 -0700 (PDT) Message-ID: <5177A5BF.8080406@linaro.org> Date: Wed, 24 Apr 2013 10:28:31 +0100 From: Will Newton User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130402 Thunderbird/17.0.5 MIME-Version: 1.0 To: binutils@sourceware.org CC: patches@linaro.org Subject: [PATCHv2, ARM] Fix handling of GOT and PLT access to IFUNC symbols X-Gm-Message-State: ALoCoQnpW43b0A0kP38+aBMxclVsSQn/3x10UZYN8XwFscQbEfa8CdT/m/obm7xtH4gGu603Qxhl X-Original-Sender: will.newton@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.175 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , bfd/ChangeLog: 2013-04-24 Will Newton * elf32-arm.c (elf32_arm_populate_plt_entry): Call elf32_arm_add_dynreloc when emitting R_ARM_IRELATIVE relocs. ld/testsuite/ChangeLog: 2013-04-24 Will Newton * ld-arm/arm-elf.exp: Add IFUNC test 17. * ld-arm/ifunc-17.dd: New file. * ld-arm/ifunc-17.gd: Likewise. * ld-arm/ifunc-17.rd: Likewise. * ld-arm/ifunc-17.s: Likweise. * ld-arm/ifunc-1.rd: Reorder relocs to match linker output. * ld-arm/ifunc-2.rd: Likewise. * ld-arm/ifunc-5.rd: Likewise. * ld-arm/ifunc-6.rd: Likewise. --- bfd/elf32-arm.c | 9 +++++++-- ld/testsuite/ld-arm/arm-elf.exp | 5 +++++ ld/testsuite/ld-arm/ifunc-1.rd | 2 +- ld/testsuite/ld-arm/ifunc-17.dd | 25 +++++++++++++++++++++++++ ld/testsuite/ld-arm/ifunc-17.gd | 10 ++++++++++ ld/testsuite/ld-arm/ifunc-17.rd | 5 +++++ ld/testsuite/ld-arm/ifunc-17.s | 24 ++++++++++++++++++++++++ ld/testsuite/ld-arm/ifunc-2.rd | 4 ++-- ld/testsuite/ld-arm/ifunc-5.rd | 2 +- ld/testsuite/ld-arm/ifunc-6.rd | 4 ++-- 10 files changed, 82 insertions(+), 8 deletions(-) create mode 100644 ld/testsuite/ld-arm/ifunc-17.dd create mode 100644 ld/testsuite/ld-arm/ifunc-17.gd create mode 100644 ld/testsuite/ld-arm/ifunc-17.rd create mode 100644 ld/testsuite/ld-arm/ifunc-17.s Changes in v2: - Call elf32_arm_add_dynreloc instead of modifying reloc_count directly. - Fix typo in testcase. diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c index 9fff630..eabf6f1 100644 --- a/bfd/elf32-arm.c +++ b/bfd/elf32-arm.c @@ -7695,8 +7695,13 @@ elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info, sgot->contents + got_offset); } - loc = srel->contents + plt_index * RELOC_SIZE (htab); - SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); + if (dynindx == -1) + elf32_arm_add_dynreloc (output_bfd, info, srel, &rel); + else + { + loc = srel->contents + plt_index * RELOC_SIZE (htab); + SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); + } } /* Some relocations map to different relocations depending on the diff --git a/ld/testsuite/ld-arm/arm-elf.exp b/ld/testsuite/ld-arm/arm-elf.exp index f13fae5..c488e3c 100644 --- a/ld/testsuite/ld-arm/arm-elf.exp +++ b/ld/testsuite/ld-arm/arm-elf.exp @@ -451,6 +451,11 @@ set armelftests_nonacl { {objdump {-s -j.data -j.got} ifunc-16.gd} {readelf -r ifunc-16.rd}} "ifunc-16"} + {"IFUNC test 17" "" "" "" {ifunc-17.s} + {{objdump -d ifunc-17.dd} + {objdump {-s -j.data -j.got} ifunc-17.gd} + {readelf -r ifunc-17.rd}} + "ifunc-17"} } run_ld_link_tests $armelftests_common diff --git a/ld/testsuite/ld-arm/ifunc-1.rd b/ld/testsuite/ld-arm/ifunc-1.rd index 75e6d70..2644123 100644 --- a/ld/testsuite/ld-arm/ifunc-1.rd +++ b/ld/testsuite/ld-arm/ifunc-1.rd @@ -4,5 +4,5 @@ There is no dynamic section in this file\. Relocation section '\.rel\.dyn' at offset 0x8000 contains 3 entries: Offset Info Type Sym\.Value Sym\. Name 0001100c ......a0 R_ARM_IRELATIVE -00011010 ......a0 R_ARM_IRELATIVE 00011014 ......a0 R_ARM_IRELATIVE +00011010 ......a0 R_ARM_IRELATIVE diff --git a/ld/testsuite/ld-arm/ifunc-17.dd b/ld/testsuite/ld-arm/ifunc-17.dd new file mode 100644 index 0000000..f23a249 --- /dev/null +++ b/ld/testsuite/ld-arm/ifunc-17.dd @@ -0,0 +1,25 @@ + +.* + + +Disassembly of section \.iplt: + +00008084 <.iplt>: +#------------------------------------------------------------------------------ +#------ appfunc1's .iplt entry +#------------------------------------------------------------------------------ + 8084: e28fc600 add ip, pc, #0, 12 + 8088: e28cca08 add ip, ip, #8, 20 ; 0x8000 + 808c: e5bcf01c ldr pc, \[ip, #28\]! + +Disassembly of section \.text: + +00008090 : + 8090: 46f7 mov pc, lr + +00008092 : + 8092: 46f7 mov pc, lr + +00008094 <_start>: + 8094: f7ff eff6 blx 8084 + 8098: 00000010 \.word 0x00000010 diff --git a/ld/testsuite/ld-arm/ifunc-17.gd b/ld/testsuite/ld-arm/ifunc-17.gd new file mode 100644 index 0000000..4a12eb8 --- /dev/null +++ b/ld/testsuite/ld-arm/ifunc-17.gd @@ -0,0 +1,10 @@ + +.* + +Contents of section \.got: +#------------------------------------------------------------------------------ +#------ 000100a8: 0x8091 (appfunc1) +#------ 000100ac: 0x8093 (appfunc2) +#------------------------------------------------------------------------------ + 1009c 00000000 00000000 00000000 91800000 .* + 100ac 93800000 .* diff --git a/ld/testsuite/ld-arm/ifunc-17.rd b/ld/testsuite/ld-arm/ifunc-17.rd new file mode 100644 index 0000000..a93fd64 --- /dev/null +++ b/ld/testsuite/ld-arm/ifunc-17.rd @@ -0,0 +1,5 @@ + +Relocation section '\.rel\.dyn' at offset 0x74 contains 2 entries: + Offset Info Type Sym\.Value Sym\. Name +000100a8 ......a0 R_ARM_IRELATIVE +000100ac ......a0 R_ARM_IRELATIVE diff --git a/ld/testsuite/ld-arm/ifunc-17.s b/ld/testsuite/ld-arm/ifunc-17.s new file mode 100644 index 0000000..75c4c56 --- /dev/null +++ b/ld/testsuite/ld-arm/ifunc-17.s @@ -0,0 +1,24 @@ + .syntax unified + .arch armv6t2 + + .global appfunc1 + .type appfunc1,%gnu_indirect_function + .thumb +appfunc1: + mov pc,lr + .size appfunc1,.-appfunc1 + + .global appfunc2 + .type appfunc2,%gnu_indirect_function + .thumb +appfunc2: + mov pc,lr + .size appfunc2,.-appfunc2 + + .global _start + .type _start,%function + .thumb +_start: + bl appfunc1(PLT) + .word appfunc2(GOT) + .size _start,.-_start diff --git a/ld/testsuite/ld-arm/ifunc-2.rd b/ld/testsuite/ld-arm/ifunc-2.rd index 92b000a..7bbabf4 100644 --- a/ld/testsuite/ld-arm/ifunc-2.rd +++ b/ld/testsuite/ld-arm/ifunc-2.rd @@ -5,9 +5,9 @@ Relocation section '\.rel\.dyn' at offset 0x8000 contains 8 entries: Offset Info Type Sym\.Value Sym\. Name 0001100c ......a0 R_ARM_IRELATIVE 00011010 ......a0 R_ARM_IRELATIVE +00011020 ......a0 R_ARM_IRELATIVE +00011028 ......a0 R_ARM_IRELATIVE 00011014 ......a0 R_ARM_IRELATIVE 00011018 ......a0 R_ARM_IRELATIVE 0001101c ......a0 R_ARM_IRELATIVE -00011020 ......a0 R_ARM_IRELATIVE 00011024 ......a0 R_ARM_IRELATIVE -00011028 ......a0 R_ARM_IRELATIVE diff --git a/ld/testsuite/ld-arm/ifunc-5.rd b/ld/testsuite/ld-arm/ifunc-5.rd index 75e6d70..2644123 100644 --- a/ld/testsuite/ld-arm/ifunc-5.rd +++ b/ld/testsuite/ld-arm/ifunc-5.rd @@ -4,5 +4,5 @@ There is no dynamic section in this file\. Relocation section '\.rel\.dyn' at offset 0x8000 contains 3 entries: Offset Info Type Sym\.Value Sym\. Name 0001100c ......a0 R_ARM_IRELATIVE -00011010 ......a0 R_ARM_IRELATIVE 00011014 ......a0 R_ARM_IRELATIVE +00011010 ......a0 R_ARM_IRELATIVE diff --git a/ld/testsuite/ld-arm/ifunc-6.rd b/ld/testsuite/ld-arm/ifunc-6.rd index 0fbfec5..04c18a9 100644 --- a/ld/testsuite/ld-arm/ifunc-6.rd +++ b/ld/testsuite/ld-arm/ifunc-6.rd @@ -3,7 +3,7 @@ There is no dynamic section in this file\. Relocation section '\.rel\.dyn' at offset 0x8000 contains 4 entries: Offset Info Type Sym\.Value Sym\. Name -0001100c ......a0 R_ARM_IRELATIVE +00011018 ......a0 R_ARM_IRELATIVE 00011010 ......a0 R_ARM_IRELATIVE +0001100c ......a0 R_ARM_IRELATIVE 00011014 ......a0 R_ARM_IRELATIVE -00011018 ......a0 R_ARM_IRELATIVE