From patchwork Tue Nov 24 21:27:52 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Lyon X-Patchwork-Id: 57270 Delivered-To: patch@linaro.org Received: by 10.112.155.196 with SMTP id vy4csp2352810lbb; Tue, 24 Nov 2015 13:28:10 -0800 (PST) X-Received: by 10.66.90.133 with SMTP id bw5mr45956546pab.1.1448400490141; Tue, 24 Nov 2015 13:28:10 -0800 (PST) Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id f12si29086461pfd.34.2015.11.24.13.28.09 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 24 Nov 2015 13:28:10 -0800 (PST) Received-SPF: pass (google.com: domain of binutils-return-89823-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; spf=pass (google.com: domain of binutils-return-89823-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=binutils-return-89823-patch=linaro.org@sourceware.org; dkim=pass header.i=@sourceware.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type; q=dns; s=default; b= MZlsVOoYT4ZKop4aRuwb+9C3VqsUvM8xaSEG2qbT4BUomE4kwH4Ec/roXJkcgVtK LW3sUvgURRL3h7VQVr/qo7zEp4lQUysyQYh4uJAlz5tLVo1UquuNljfvmEpZ7LAt 8G+2h+9BzSRmrn3+nDeZ9n9xIwX7llKL7H7zRMwqYnQ= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type; s=default; bh=QRqbe KUM6OXB74RL3x3N+DU3DFw=; b=mozQNqiBfEuyyxarM/gwD6HJUPr7vO4JppD30 XNfPTa6h+mpLUw44OiIGBEDyiaajh3nfXzOkp8MS6A+60fAHoQWCWeXVrtPc2rsy ZrJdI40+tNJDJ47N7H8ezf/d/wAiUNXpUVJwm6rnzrfRA/n3iXsgz9rY3CzifmWQ ZWIuus= Received: (qmail 48307 invoked by alias); 24 Nov 2015 21:27:57 -0000 Mailing-List: contact binutils-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: binutils-owner@sourceware.org Delivered-To: mailing list binutils@sourceware.org Received: (qmail 48296 invoked by uid 89); 24 Nov 2015 21:27:57 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=0.0 required=5.0 tests=AWL, BAYES_95, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=no version=3.3.2 X-HELO: mail-qg0-f54.google.com Received: from mail-qg0-f54.google.com (HELO mail-qg0-f54.google.com) (209.85.192.54) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Tue, 24 Nov 2015 21:27:54 +0000 Received: by qgec40 with SMTP id c40so19993094qge.2 for ; Tue, 24 Nov 2015 13:27:52 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type; bh=atkkIwoVQtNVVjbffqYigkndrQkWuM9iOXR9JU90gqI=; b=FbR1Hqs3IiiwytKWUjLdMPBKiKXiFquMMZsIbo21kzL+7OrTp9D0rfRzXNkMByCMdI ayO9huUKNFpIJfain6/qJQtwNXmpDdUuRSQ3Z+Puf/o44vnTLo2E+7vljgsdXgi1gdrP Lj/r5oQi83cpQsgUUTyU4Na5G8Ob+YNyOnJ8gyG2qLvwCSm91zZXhI6uxlIpJCY7YOSd i4O8gidzn8k8R8GbEtN2Uj7s3IjjG2yNYuujHbOvmOBjIz7KJn78rtNGbYUbkSuRvfnC XkEgAUF7H/qu+ETYLsEA5jxVNyTN9RDNtcwDUNO2YNa1nM3RxJCFpok2lWLwkU5na7Zo 4/vg== X-Gm-Message-State: ALoCoQlCUMumnggwgdhwKZuXzZRs2gn0EnPm+YM509yO3A2cyX+Isuk1zyilvyYSjUoUsOGMMQk3 MIME-Version: 1.0 X-Received: by 10.140.99.86 with SMTP id p80mr16995488qge.97.1448400472377; Tue, 24 Nov 2015 13:27:52 -0800 (PST) Received: by 10.140.109.200 with HTTP; Tue, 24 Nov 2015 13:27:52 -0800 (PST) In-Reply-To: <5654866D.80105@redhat.com> References: <56532CF5.5070300@st.com> <5654866D.80105@redhat.com> Date: Tue, 24 Nov 2015 22:27:52 +0100 Message-ID: Subject: Re: [PATCH] [GAS, ARM] Invalid LDR immediate transformation From: Christophe Lyon To: Nick Clifton Cc: Christophe MONAT , "binutils@sourceware.org" X-IsSubscribed: yes On 24 November 2015 at 16:46, Nick Clifton wrote: > Hi Christophe, > >> I have attached a patch, tested on an x86_64 host in arm-none-eabi >> arm-linux-eabi arm-nacl, no regression. > > > This patch is approved for the mainline. > I've commit it on Christophe's behalf. It needed a small adjustment in the testcase after a recent fix from Matthew in the same area. I've attached what I have committed. I hope I did it right (commit message), since it's my first commit in binutils since we switched to git :-) > It probably should go into the 2.26 branch as well, but please check with > Tristan first. > Since Matthew's patch is in the 2.26 branch too, we need the updated testcase if this patch is OK for 2.26. Tristan? Thanks, Christophe. > Cheers > Nick > > commit 2c32be708da9011b3ce7404f2be43b17ab1eddd4 Author: Christophe Monat Date: Tue Nov 24 22:17:54 2015 +0100 [GAS, ARM] Invalid LDR immediate transformation 2015-11-24 Christophe Monat * config/tc-arm.c (move_or_literal_pool): Do not transform ldr ri,=imm into movs when ri is a high register in T1. 2015-11-24 Christophe Monat * gas/arm/thumb2_ldr_immediate_armv6t2.s: Added high register tests. * gas/arm/thumb2_ldr_immediate_armv6t2.d: Accounted for new test cases. * gas/arm/thumb2_ldr_immediate_highregs_armv6t2.s: New. * gas/arm/thumb2_ldr_immediate_highregs_armv6t2.d: New. diff --git a/gas/ChangeLog b/gas/ChangeLog index bec87cf..1077066 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2015-11-24 Christophe Monat + + * config/tc-arm.c (move_or_literal_pool): Do not transform ldr + ri,=imm into movs when ri is a high register in T1. + 2015-11-20 Nick Clifton * po/fr.po: Updated French translation. diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index 23c506d..8ea1e8d 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -7839,7 +7839,8 @@ move_or_literal_pool (int i, enum lit_type t, bfd_boolean mode_3) { if (thumb_p) { - if ((v & ~0xFF) == 0) + /* This can be encoded only for a low register. */ + if ((v & ~0xFF) == 0 && (inst.operands[i].reg < 8)) { /* This can be done with a mov(1) instruction. */ inst.instruction = T_OPCODE_MOV_I8 | (inst.operands[i].reg << 8); diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index a38fc25..aae4691 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,12 @@ +2015-11-24 Christophe Monat + + * gas/arm/thumb2_ldr_immediate_armv6t2.s: Added high register + tests. + * gas/arm/thumb2_ldr_immediate_armv6t2.d: Accounted for new test + cases. + * gas/arm/thumb2_ldr_immediate_highregs_armv6t2.s: New. + * gas/arm/thumb2_ldr_immediate_highregs_armv6t2.d: New. + 2015-11-24 Matthew Wahab * gas/arm/armv7e-m+fpv5-d16.d: Skip test for *-*-pe, *-wince-* and diff --git a/gas/testsuite/gas/arm/thumb2_ldr_immediate_armv6t2.d b/gas/testsuite/gas/arm/thumb2_ldr_immediate_armv6t2.d index 6897bcd..09c46a8 100644 --- a/gas/testsuite/gas/arm/thumb2_ldr_immediate_armv6t2.d +++ b/gas/testsuite/gas/arm/thumb2_ldr_immediate_armv6t2.d @@ -1,4 +1,4 @@ -# name: Ldr immediate on armv6 +# name: Ldr immediate on armv6t2 # as: -march=armv6t2 # objdump: -dr --prefix-addresses --show-raw-insn #skip: *-*-pe *-wince-* *-*-coff @@ -10,7 +10,13 @@ Disassembly of section .text: 0[0-9a-f]+ <[^>]+> f04f 2163 mov.w r1, #1660969728 .* 0[0-9a-f]+ <[^>]+> f04f 1151 mov.w r1, #5308497 .* 0[0-9a-f]+ <[^>]+> f44f 228e mov.w r2, #290816 .* -0[0-9a-f]+ <[^>]+> 4a01 ldr r2, \[pc, #4\] .* +0[0-9a-f]+ <[^>]+> 4a07 ldr r2, \[pc, #28\] .* 0[0-9a-f]+ <[^>]+> f241 32f1 movw r2, #5105 .* +0[0-9a-f]+ <[^>]+> f04f 3872 mov.w r8, #1920103026 .* +0[0-9a-f]+ <[^>]+> f04f 2863 mov.w r8, #1660969728 .* +0[0-9a-f]+ <[^>]+> f04f 1851 mov.w r8, #5308497 .* +0[0-9a-f]+ <[^>]+> f44f 298e mov.w r9, #290816 .* +0[0-9a-f]+ <[^>]+> f8df 9008 ldr.w r9, \[pc, #8\] .* +0[0-9a-f]+ <[^>]+> f241 39f1 movw r9, #5105 .* 0[0-9a-f]+ <[^>]+> 0000 .short 0x0000 0[0-9a-f]+ <[^>]+> ff320000 .word 0xff320000 diff --git a/gas/testsuite/gas/arm/thumb2_ldr_immediate_armv6t2.s b/gas/testsuite/gas/arm/thumb2_ldr_immediate_armv6t2.s index 22a5014..4b94c91 100644 --- a/gas/testsuite/gas/arm/thumb2_ldr_immediate_armv6t2.s +++ b/gas/testsuite/gas/arm/thumb2_ldr_immediate_armv6t2.s @@ -9,4 +9,10 @@ thumb2_ldr: ldr r2,=0x00047000 ldr r2,=0xFF320000 ldr r2,=0x000013F1 + ldr r8,=0x72727272 + ldr r8,=0x63006300 + ldr r8,=0x00510051 + ldr r9,=0x00047000 + ldr r9,=0xFF320000 + ldr r9,=0x000013F1 .pool diff --git a/gas/testsuite/gas/arm/thumb2_ldr_immediate_highregs_armv6t2.d b/gas/testsuite/gas/arm/thumb2_ldr_immediate_highregs_armv6t2.d new file mode 100644 index 0000000..55b5f17 --- /dev/null +++ b/gas/testsuite/gas/arm/thumb2_ldr_immediate_highregs_armv6t2.d @@ -0,0 +1,24 @@ +# name: Ldr small immediate high registers on armv6t2 +# as: -march=armv6t2 +# objdump: -dr --prefix-addresses --show-raw-insn +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +.*: +file format .*arm.* + +Disassembly of section \.text: +0[0-9a-f]+ <[^>]+> 2000[[:space:]]+movs[[:space:]]+r0, #0.* +0[0-9a-f]+ <[^>]+> 2108[[:space:]]+movs[[:space:]]+r1, #8.* +0[0-9a-f]+ <[^>]+> 2251[[:space:]]+movs[[:space:]]+r2, #81.* +0[0-9a-f]+ <[^>]+> 231f[[:space:]]+movs[[:space:]]+r3, #31.* +0[0-9a-f]+ <[^>]+> 242f[[:space:]]+movs[[:space:]]+r4, #47.* +0[0-9a-f]+ <[^>]+> 253f[[:space:]]+movs[[:space:]]+r5, #63.* +0[0-9a-f]+ <[^>]+> 2680[[:space:]]+movs[[:space:]]+r6, #128.* +0[0-9a-f]+ <[^>]+> 27ff[[:space:]]+movs[[:space:]]+r7, #255.* +0[0-9a-f]+ <[^>]+> f04f 0800[[:space:]]+mov\.w[[:space:]]+r8, #0.* +0[0-9a-f]+ <[^>]+> f04f 0908[[:space:]]+mov\.w[[:space:]]+r9, #8.* +0[0-9a-f]+ <[^>]+> f04f 0a51[[:space:]]+mov\.w[[:space:]]+sl, #81.* +0[0-9a-f]+ <[^>]+> f04f 0b1f[[:space:]]+mov\.w[[:space:]]+fp, #31.* +0[0-9a-f]+ <[^>]+> f04f 0c2f[[:space:]]+mov\.w[[:space:]]+ip, #47.* +0[0-9a-f]+ <[^>]+> f04f 0d3f[[:space:]]+mov\.w[[:space:]]+sp, #63.* +0[0-9a-f]+ <[^>]+> f04f 0e80[[:space:]]+mov\.w[[:space:]]+lr, #128.* +0[0-9a-f]+ <[^>]+> f04f 0fff[[:space:]]+mov\.w[[:space:]]+pc, #255.* diff --git a/gas/testsuite/gas/arm/thumb2_ldr_immediate_highregs_armv6t2.s b/gas/testsuite/gas/arm/thumb2_ldr_immediate_highregs_armv6t2.s new file mode 100644 index 0000000..d225410 --- /dev/null +++ b/gas/testsuite/gas/arm/thumb2_ldr_immediate_highregs_armv6t2.s @@ -0,0 +1,24 @@ + .thumb + .syntax unified + .thumb_func +thumb2_ldr: + # These can be encoded into movs since constant is small + # And register can be encoded in 3 bits + ldr r0,=0x00 + ldr r1,=0x08 + ldr r2,=0x51 + ldr r3,=0x1F + ldr r4,=0x2F + ldr r5,=0x3F + ldr r6,=0x80 + ldr r7,=0xFF + # These shall be encoded into mov.w + # Since register cannot be encoded in 3 bits + ldr r8,=0x00 + ldr r9,=0x08 + ldr r10,=0x51 + ldr r11,=0x1F + ldr r12,=0x2F + ldr r13,=0x3F + ldr r14,=0x80 + ldr r15,=0xFF