From patchwork Mon Mar 2 14:32:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hemant Agrawal X-Patchwork-Id: 184063 Delivered-To: patch@linaro.org Received: by 2002:a92:1f12:0:0:0:0:0 with SMTP id i18csp2169548ile; Mon, 2 Mar 2020 01:00:35 -0800 (PST) X-Google-Smtp-Source: APXvYqyfSoKMBfUxkqaM19/BmPETnLyAG60QXAi6d0p4SBbAQuX3vNZwPLnX2NDz33A8GPieNf2s X-Received: by 2002:a17:906:9615:: with SMTP id s21mr14232230ejx.20.1583139635536; Mon, 02 Mar 2020 01:00:35 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1583139635; cv=none; d=google.com; s=arc-20160816; b=gTmKeRwdgcQu4bkQOIdrABqQ7o3RPTeP0+5FWRG42LpYj6IpTOjJibcii4bgLCEmEp a4tI+lvFQ1YXF6vszFSnFmywAV9jHi/586dbiL+uERk0uNHhLd4bEfQyMnI8kGQ4BI4b v5WetiHlVTnVrxJp4UVQy+mAoJOBAUJLYlDOE0gt2Yp//viykhNtVW8NZTEdkf8c2+TB gdaFmMEOR02M4FrsBBGIPXYZFgR0hVxJPrsEUtynazc9R4FUdcef1cXX43oAMXzVS+vD rjkUSjIP4yXPhrf8A8d3E5wkJv4X7cWSiChdzbhRBmKN/t5L0ROQ/1nfxgYcKOiREtEv mdvg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:cc:to:from; bh=Yr5e17qwDOy2jvlMd8OGbFgqMvmOzo5gLHyoeAOcRFo=; b=uMC+l7IHaQo4BNIUzSWMkBRnqBOcQSCSoET/Y7sx8jl3iQRbnk0kaBVXFokzhtG48G 2n4S/PxKrzc0gQlWnoaMNgl5NMP+7HaBsO6T9OiDz2SClU2gjZCdnIOkquf1X5mMPZgF vQOHJak+vNwwwtjKVXXl2TOl4spUC0tP95Ayuh0CV4ViCmIt6FFFkNZFow6t7ZwbdonY TWZl+6v4TJe4Ta7ovMbVi2jGIpDlmP6bItpL9kmPiclEF172atFLbsLDHhEQOcctubDt 2benWA6RruvulpFPwF7AGDYKEPKf+bq05hsa0sTNu8DQb37Bd+3+F//TgByirfiBSZq/ pQxA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) smtp.mailfrom=dev-bounces@dpdk.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Return-Path: Received: from dpdk.org (dpdk.org. [92.243.14.124]) by mx.google.com with ESMTP id i6si1720988ejy.300.2020.03.02.01.00.35; Mon, 02 Mar 2020 01:00:35 -0800 (PST) Received-SPF: pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) client-ip=92.243.14.124; Authentication-Results: mx.google.com; spf=pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) smtp.mailfrom=dev-bounces@dpdk.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 03F151C028; Mon, 2 Mar 2020 10:00:19 +0100 (CET) Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by dpdk.org (Postfix) with ESMTP id 34C691C001 for ; Mon, 2 Mar 2020 10:00:16 +0100 (CET) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id E3FE01A0FB0; Mon, 2 Mar 2020 10:00:15 +0100 (CET) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 64F111A1005; Mon, 2 Mar 2020 10:00:13 +0100 (CET) Received: from bf-netperf1.ap.com (bf-netperf1.ap.freescale.net [10.232.133.63]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id B8C6540323; Mon, 2 Mar 2020 17:00:09 +0800 (SGT) From: Hemant Agrawal To: ferruh.yigit@intel.com Cc: dev@dpdk.org, g.singh@nxp.com, Alex Marginean Date: Mon, 2 Mar 2020 20:02:01 +0530 Message-Id: <20200302143209.11854-3-hemant.agrawal@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200302143209.11854-1-hemant.agrawal@nxp.com> References: <20200302143209.11854-1-hemant.agrawal@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Subject: [dpdk-dev] [PATCH 02/10] net/enetc: use relaxed read for Tx CI in clean Tx X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Alex Marginean We don't need barriers here since this read doesn't have to be strictly serialized in relation to other surrounding memory/register accesses. We only want a reasonably recent value out of hardware so we know how much we can clean. Signed-off-by: Alex Marginean --- drivers/net/enetc/enetc_rxtx.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) -- 2.17.1 diff --git a/drivers/net/enetc/enetc_rxtx.c b/drivers/net/enetc/enetc_rxtx.c index b7ecb75ec..395f5ecf4 100644 --- a/drivers/net/enetc/enetc_rxtx.c +++ b/drivers/net/enetc/enetc_rxtx.c @@ -23,12 +23,15 @@ enetc_clean_tx_ring(struct enetc_bdr *tx_ring) struct enetc_swbd *tx_swbd; int i, hwci; + /* we don't need barriers here, we just want a relatively current value + * from HW. + */ + hwci = (int)(rte_read32_relaxed(tx_ring->tcisr) & + ENETC_TBCISR_IDX_MASK); + i = tx_ring->next_to_clean; tx_swbd = &tx_ring->q_swbd[i]; - hwci = (int)(enetc_rd_reg(tx_ring->tcisr) & - ENETC_TBCISR_IDX_MASK); - /* we're only reading the CI index once here, which means HW may update * it while we're doing clean-up. We could read the register in a loop * but for now I assume it's OK to leave a few Tx frames for next call.