From patchwork Fri Jun 26 20:35:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Honnappa Nagarahalli X-Patchwork-Id: 191919 Delivered-To: patch@linaro.org Received: by 2002:a92:d244:0:0:0:0:0 with SMTP id v4csp820012ilg; Fri, 26 Jun 2020 13:35:33 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy/gG57UdrPljbbespcLncZTvMxGyTTMMH0YIG6f0dXXb26BVJsTUK2Pa/d1uzlbKlhETsV X-Received: by 2002:aa7:c407:: with SMTP id j7mr5245827edq.96.1593203733394; Fri, 26 Jun 2020 13:35:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1593203733; cv=none; d=google.com; s=arc-20160816; b=ueKkM/eKaqmOEi45NhdtyN35nECRraAS79BuQu8eGYrDdftl3TbTWKi2BHGJmbShdl x5+g94R3uCf3THb1samY0d2Ho0+5m27i6hrl7hYN2H9jkVk/TRW/X3ml2MxfhhxexF4W OgiqgfUkT9fsNUSXatpvjpQhT4M/KPxA69Z/1+SRfcXBQ0XcNz8zwn3hEsuwVMalFpNP OVNb3lC54iPC8ZHbG4b/Cyi3IcGBmq3hrMB/6ixV4rQsNDj/uPYjgGzln9Lwt+xl3gHl /P8tsKsGiuNxxVCJrAafJ+M5vve7JB5fyv6YQ7vJ4dVWRzJrf75JeL8IsGE3cxLS9hgr ricA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:cc:to:from; bh=+G6VD9yqv0rsLpBQJNdTz7oYJ9832BWGlwtvzngpfNY=; b=pEpiryWLKKTVgoHDBZQLtLl5E/qJ/UdttVPjexf8YtY0cJb6VVaG5EC7j3vj3sG8pK IBIUa59o7T99RgcwgI9CAlr9KFjNi+l0mScuZEX3/51rrdd9y1m+ALvUTv11jbHA1tlK JYnlFftZBYafJvUt++BMKZtQxSxHU4mSExgUvEWGpCDH6wEcetJqIYo0kQNqLwqSRhQU mNePdS/C8TvArH99Dm6/HyyYMAVWLGHd5GAKWRoWIK/7T92dzEk/mj8+b9Sw9ZizRHIH 0RMprbhEy/B72I+hl3y+2huv97V51Lw8LMzVTtszM2US7H9cLqNPiKtQ6KmorCA7x2f1 WQ3w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) smtp.mailfrom=dev-bounces@dpdk.org Return-Path: Received: from dpdk.org (dpdk.org. [92.243.14.124]) by mx.google.com with ESMTP id pw19si12299435ejb.752.2020.06.26.13.35.33; Fri, 26 Jun 2020 13:35:33 -0700 (PDT) Received-SPF: pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) client-ip=92.243.14.124; Authentication-Results: mx.google.com; spf=pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) smtp.mailfrom=dev-bounces@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id F22D71BEB4; Fri, 26 Jun 2020 22:35:32 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by dpdk.org (Postfix) with ESMTP id E66071BEB3 for ; Fri, 26 Jun 2020 22:35:25 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 725A2D6E; Fri, 26 Jun 2020 13:35:25 -0700 (PDT) Received: from qc2400f-1.austin.arm.com (qc2400f-1.austin.arm.com [10.118.12.27]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 608F23F6CF; Fri, 26 Jun 2020 13:35:25 -0700 (PDT) From: Honnappa Nagarahalli To: dev@dpdk.org, honnappa.nagarahalli@arm.com, jerinj@marvell.com, hemant.agrawal@nxp.com, akhil.goyal@nxp.com, ogerlitz@mellanox.com, ajit.khaparde@broadcom.com, pbhagavatula@marvell.com Cc: nd@arm.com Date: Fri, 26 Jun 2020 15:35:02 -0500 Message-Id: <20200626203502.20658-2-honnappa.nagarahalli@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200626203502.20658-1-honnappa.nagarahalli@arm.com> References: <20200608213417.9764-1-honnappa.nagarahalli@arm.com> <20200626203502.20658-1-honnappa.nagarahalli@arm.com> Subject: [dpdk-dev] [PATCH v2 2/2] eal/arm: change inline functions to always inline X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Change the inline functions to use __rte_always_inline to be consistent with rest of the inline functions. Signed-off-by: Honnappa Nagarahalli --- lib/librte_eal/arm/include/rte_cycles_64.h | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) -- 2.17.1 Acked-by: Jerin Jacob diff --git a/lib/librte_eal/arm/include/rte_cycles_64.h b/lib/librte_eal/arm/include/rte_cycles_64.h index e41f9dbd6..029fdc435 100644 --- a/lib/librte_eal/arm/include/rte_cycles_64.h +++ b/lib/librte_eal/arm/include/rte_cycles_64.h @@ -50,7 +50,7 @@ __rte_arm64_cntvct_precise(void) * This call is portable to any ARMv8 architecture, however, typically * cntvct_el0 runs at <= 100MHz and it may be imprecise for some tasks. */ -static inline uint64_t +static __rte_always_inline uint64_t rte_rdtsc(void) { return __rte_arm64_cntvct(); @@ -85,22 +85,25 @@ __rte_arm64_pmccntr(void) return tsc; } -static inline uint64_t +static __rte_always_inline uint64_t rte_rdtsc(void) { return __rte_arm64_pmccntr(); } #endif -static inline uint64_t +static __rte_always_inline uint64_t rte_rdtsc_precise(void) { asm volatile("isb" : : : "memory"); return rte_rdtsc(); } -static inline uint64_t -rte_get_tsc_cycles(void) { return rte_rdtsc(); } +static __rte_always_inline uint64_t +rte_get_tsc_cycles(void) +{ + return rte_rdtsc(); +} #ifdef __cplusplus }