From patchwork Wed Nov 7 08:27:19 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jyri Sarha X-Patchwork-Id: 150378 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp4894041ljp; Wed, 7 Nov 2018 00:27:56 -0800 (PST) X-Google-Smtp-Source: AJdET5dDbi4CIybF7z74ysY1JzdTuteBiMukihPWXef6dF8szO3oBELZGK4MVPvE6KgxNjd0dfZL X-Received: by 2002:a62:250:: with SMTP id 77-v6mr1018124pfc.16.1541579276015; Wed, 07 Nov 2018 00:27:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1541579276; cv=none; d=google.com; s=arc-20160816; b=aV0kUg5bY2ETLpb2XI/om22MyvS5whS4JeAxVpWfjZKZFFdKfU5nEr63n443NykZas F8nB1NnrYzVzAUVD91Hy6aJRo8nMsAlqGeORB6zq0fNKauh0vTc6koFL5vN3n/fXjh36 HIXHygmQo78HBhR5A2is7ySBPnFgNo3OAZEjRGNBfitIps3st7BNMAtDiN6jY1uZ9Q6G t1/iGpkKzuD96Tt1+yspXRx5X4iJX0AMqmWrx9Con0W4M+p6pfskH4udnC/R5LmcqsPW 19fL1klkUBTeXZZ/tLnCPpjIQ0fopeNe+Zy09hdjIMq+E7v+iqXUE7dBsQTXGbEvAoV0 me5A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:cc:list-subscribe :list-help:list-post:list-archive:list-unsubscribe:list-id :precedence:mime-version:references:in-reply-to:message-id:date :subject:to:from:delivered-to; bh=Abvo5jnfd48oxi/v7OzL2gEubJ5QhIBnaH+tWKqUAnw=; b=ZEe4Fg87No8dFN4FnD0nswKfATQ53zf0+sqALKQzHWawPa39JLeW/0yWMmR8wvjAK9 jqQVjhfGITPMETjU6xYZDnC9Fft4zVA90WVT22vpSJxFJrM/W3tqINrc8hNdstA4cx9y arSQWLy+BB+UTsylBrvkVDKwlMClaaBwoIXmXZBGOEN7YyfR2cPN5Z4PcL4+/a5zYxe8 RYAaOPuBmFohOD/gpXb00Jn/Tf0RFNPicBPJIZ3ewtMucuFlFyY8bEBV/F2WJq/H325V TQE7yiYFUxSsspMqo0QUzBwrWipabcwK/iGwdyGj0B1RynVyyOle2YEBZDpIYECVDaqz KHGA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 2610:10:20:722:a800:ff:fe36:1795 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [2610:10:20:722:a800:ff:fe36:1795]) by mx.google.com with ESMTPS id 63-v6si22282414pfg.234.2018.11.07.00.27.55 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 07 Nov 2018 00:27:56 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 2610:10:20:722:a800:ff:fe36:1795 as permitted sender) client-ip=2610:10:20:722:a800:ff:fe36:1795; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 2610:10:20:722:a800:ff:fe36:1795 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E4AC46E4F1; Wed, 7 Nov 2018 08:27:50 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by gabe.freedesktop.org (Postfix) with ESMTPS id 123A16E47A for ; Wed, 7 Nov 2018 08:27:35 +0000 (UTC) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id wA78RW6V098821; Wed, 7 Nov 2018 02:27:32 -0600 Received: from DFLE102.ent.ti.com (dfle102.ent.ti.com [10.64.6.23]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id wA78RWZC085682 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 7 Nov 2018 02:27:32 -0600 Received: from DFLE103.ent.ti.com (10.64.6.24) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Wed, 7 Nov 2018 02:27:32 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Wed, 7 Nov 2018 02:27:32 -0600 Received: from jadmar.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id wA78RQZo032207; Wed, 7 Nov 2018 02:27:30 -0600 From: Jyri Sarha To: Subject: [PATCH v3 2/8] dt-bindings: display/ti: add am65x-dss bindings Date: Wed, 7 Nov 2018 10:27:19 +0200 Message-ID: <1541579245-10715-3-git-send-email-jsarha@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1541579245-10715-1-git-send-email-jsarha@ti.com> References: <1541579245-10715-1-git-send-email-jsarha@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.ujfalusi@ti.com, tomi.valkeinen@ti.com, laurent.pinchart@ideasonboard.com, subhajit_paul@ti.com, jjhiblot@ti.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Tomi Valkeinen Add DT bindings for Texas Instruments AM65x SoC Display Subsystem. The DSS7 on AM65x SoC has two video ports (DPI and OLDI) and two video pipelines. Signed-off-by: Jyri Sarha Signed-off-by: Tomi Valkeinen Cc: devicetree@vger.kernel.org Signed-off-by: Jyri Sarha --- .../devicetree/bindings/display/ti/ti,am6-dss.txt | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/ti/ti,am6-dss.txt diff --git a/Documentation/devicetree/bindings/display/ti/ti,am6-dss.txt b/Documentation/devicetree/bindings/display/ti/ti,am6-dss.txt new file mode 100644 index 0000000..3466f09 --- /dev/null +++ b/Documentation/devicetree/bindings/display/ti/ti,am6-dss.txt @@ -0,0 +1,16 @@ +Texas Instruments AM65x Display Subsystem +========================================== + +Required properties: +- compatible: "ti,am65x-dss", "ti,am6-dss" +- reg: address and length of the register spaces for DSS submodules +- reg-names: "common", "vidl1", "vid", "ovr1", "ovr2", "vp1", "vp2" +- clocks: phandle to fclk, vp1, and vp2 clocks +- clock-names: "fck", "vp1", "vp2" +- interrupts: phandle to the DISPC interrupt +- syscon: phandle to syscon device handling OLDI_PWRDN_TX (partition 1 of + AM654 CTRL MMR0) + +The DSS outputs are described using the device graphs as documented in +Documentation/devicetree/bindings/graph.txt. AM6 DSS has a DPI output as port 0 +and an OLDI output as port 1.