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[131.252.210.177]) by mx.google.com with ESMTPS id g3si1580904pgp.39.2017.09.01.02.37.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 01 Sep 2017 02:37:00 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=cfewkTcc; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 778926E80F; Fri, 1 Sep 2017 09:36:59 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lf0-x232.google.com (mail-lf0-x232.google.com [IPv6:2a00:1450:4010:c07::232]) by gabe.freedesktop.org (Postfix) with ESMTPS id D93D26E808 for ; Fri, 1 Sep 2017 09:36:57 +0000 (UTC) Received: by mail-lf0-x232.google.com with SMTP id d17so7315848lfe.1 for ; Fri, 01 Sep 2017 02:36:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=hk5e9u7wu0nIZ97flOuE/8XaEygU7rSPh7eDKDZ1gyI=; b=cfewkTccEAq8cT3Bmo+tWC3bY694GSKg/tsFWfQwfxsvHyqXMGTw+UX1EXVXRTcZCV CRiq4QH1yn5MBkt2tpKyAv7DDKOSSOQeeTgbJYX5q6/RekOqa/zzdRf62Qdd7mm2Xzmx 2D9uqamSrp7OSJ2utq5N+EdycjJYMiHQeggwA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=hk5e9u7wu0nIZ97flOuE/8XaEygU7rSPh7eDKDZ1gyI=; b=P6c2bkx1iNWebRdq2w894HPyAMrWir0hDwzI9gXuw2LwzShBhPFMSUyVrOqJZInxgk p6jJyDo0xWKXZvj22r9TxHsy+NFPrQzZ5ptw7AwpGBfJ2/kOYzaLIvpqTcQLY1qkm6gA lo1zkM8uLYJe9suEDqYaA2cm2yPhfs0drseNPWaJbX8TIF85ATUtVRpjjoNWgBG1d0tm V/PhD8mQ+1kNulCdH01S/MaCCe8kCmPGcB1or9xHDaXGwfVww954eXCsaIKkPIJxgpcj dSjwQWkMD5Bna3WWKUwhmbcy+kzbULf3GDcSbrrnX+2AXR/MIIQ7ttXYbdph8oiPIP/8 SqBQ== X-Gm-Message-State: AHPjjUjBjiOUzsj+3LCLQj5V5SOdQNieTs9RyWgqs3W3hUtajJ7OMU65 86XyzcKEnbxsqB4+ X-Google-Smtp-Source: ADKCNb493GiNnHVxi0rnRVMucvgPbvnAf9aoODEXgHCR659gG3SpWuQG1qvkRiM1cbs87n8Zv7/AMQ== X-Received: by 10.25.242.72 with SMTP id d8mr532958lfk.185.1504258616044; Fri, 01 Sep 2017 02:36:56 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id x18sm328588ljd.85.2017.09.01.02.36.54 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 01 Sep 2017 02:36:55 -0700 (PDT) From: Linus Walleij To: Daniel Vetter , Jani Nikula , Sean Paul , Eric Anholt Subject: [PATCH 4/7 v2] drm/pl111: Enable PL110 variant Date: Fri, 1 Sep 2017 11:36:34 +0200 Message-Id: <20170901093637.4041-5-linus.walleij@linaro.org> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20170901093637.4041-1-linus.walleij@linaro.org> References: <20170901093637.4041-1-linus.walleij@linaro.org> Cc: linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" We detect and enable the use of the PL110 variant, an earlier incarnation of PL111. The only real difference is that the control and interrupt enable registers have swapped place. The Versatile AB and Versatile PB have a variant inbetween PL110 and PL111, it is PL110 but they have already swapped the two registers so those two need a bit of special handling. Reviewed-by: Eric Anholt Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Fix static const on the variant struct holders. (Had to insert a (void*) cast for this because amba_id is not consting this field) - Collect Eric A's Reviewed-by --- drivers/gpu/drm/pl111/pl111_display.c | 27 +++-------- drivers/gpu/drm/pl111/pl111_drm.h | 17 +++++++ drivers/gpu/drm/pl111/pl111_drv.c | 86 +++++++++++++++++++++++++++++++++-- 3 files changed, 106 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/pl111/pl111_display.c b/drivers/gpu/drm/pl111/pl111_display.c index 59cdb8f49bb1..51e3530c876c 100644 --- a/drivers/gpu/drm/pl111/pl111_display.c +++ b/drivers/gpu/drm/pl111/pl111_display.c @@ -198,7 +198,7 @@ static void pl111_display_enable(struct drm_simple_display_pipe *pipe, break; } - writel(cntl, priv->regs + CLCD_PL111_CNTL); + writel(cntl, priv->regs + priv->ctrl); drm_crtc_vblank_on(crtc); } @@ -212,7 +212,7 @@ void pl111_display_disable(struct drm_simple_display_pipe *pipe) drm_crtc_vblank_off(crtc); /* Disable and Power Down */ - writel(0, priv->regs + CLCD_PL111_CNTL); + writel(0, priv->regs + priv->ctrl); clk_disable_unprepare(priv->clk); } @@ -250,7 +250,7 @@ int pl111_enable_vblank(struct drm_device *drm, unsigned int crtc) { struct pl111_drm_dev_private *priv = drm->dev_private; - writel(CLCD_IRQ_NEXTBASE_UPDATE, priv->regs + CLCD_PL111_IENB); + writel(CLCD_IRQ_NEXTBASE_UPDATE, priv->regs + priv->ienb); return 0; } @@ -259,7 +259,7 @@ void pl111_disable_vblank(struct drm_device *drm, unsigned int crtc) { struct pl111_drm_dev_private *priv = drm->dev_private; - writel(0, priv->regs + CLCD_PL111_IENB); + writel(0, priv->regs + priv->ienb); } static int pl111_display_prepare_fb(struct drm_simple_display_pipe *pipe, @@ -403,22 +403,6 @@ int pl111_display_init(struct drm_device *drm) struct device_node *endpoint; u32 tft_r0b0g0[3]; int ret; - static const u32 formats[] = { - DRM_FORMAT_ABGR8888, - DRM_FORMAT_XBGR8888, - DRM_FORMAT_ARGB8888, - DRM_FORMAT_XRGB8888, - DRM_FORMAT_BGR565, - DRM_FORMAT_RGB565, - DRM_FORMAT_ABGR1555, - DRM_FORMAT_XBGR1555, - DRM_FORMAT_ARGB1555, - DRM_FORMAT_XRGB1555, - DRM_FORMAT_ABGR4444, - DRM_FORMAT_XBGR4444, - DRM_FORMAT_ARGB4444, - DRM_FORMAT_XRGB4444, - }; endpoint = of_graph_get_next_endpoint(dev->of_node, NULL); if (!endpoint) @@ -447,7 +431,8 @@ int pl111_display_init(struct drm_device *drm) ret = drm_simple_display_pipe_init(drm, &priv->pipe, &pl111_display_funcs, - formats, ARRAY_SIZE(formats), + priv->variant->formats, + priv->variant->nformats, priv->connector); if (ret) return ret; diff --git a/drivers/gpu/drm/pl111/pl111_drm.h b/drivers/gpu/drm/pl111/pl111_drm.h index 8804af0f8997..eeaabe735058 100644 --- a/drivers/gpu/drm/pl111/pl111_drm.h +++ b/drivers/gpu/drm/pl111/pl111_drm.h @@ -31,6 +31,20 @@ struct drm_minor; +/** + * struct pl111_variant_data - encodes IP differences + * @name: the name of this variant + * @is_pl110: this is the early PL110 variant + * @formats: array of supported pixel formats on this variant + * @nformats: the length of the array of supported pixel formats + */ +struct pl111_variant_data { + const char *name; + bool is_pl110; + const u32 *formats; + unsigned int nformats; +}; + struct pl111_drm_dev_private { struct drm_device *drm; @@ -42,6 +56,8 @@ struct pl111_drm_dev_private { struct drm_fbdev_cma *fbdev; void *regs; + u32 ienb; + u32 ctrl; /* The pixel clock (a reference to our clock divider off of CLCDCLK). */ struct clk *clk; /* pl111's internal clock divider. */ @@ -50,6 +66,7 @@ struct pl111_drm_dev_private { * subsystem and pl111_display_enable(). */ spinlock_t tim2_lock; + const struct pl111_variant_data *variant; }; int pl111_display_init(struct drm_device *dev); diff --git a/drivers/gpu/drm/pl111/pl111_drv.c b/drivers/gpu/drm/pl111/pl111_drv.c index e66cbf202e17..c4a654867ed1 100644 --- a/drivers/gpu/drm/pl111/pl111_drv.c +++ b/drivers/gpu/drm/pl111/pl111_drv.c @@ -206,6 +206,7 @@ static int pl111_amba_probe(struct amba_device *amba_dev, { struct device *dev = &amba_dev->dev; struct pl111_drm_dev_private *priv; + struct pl111_variant_data *variant = id->data; struct drm_device *drm; int ret; @@ -219,6 +220,33 @@ static int pl111_amba_probe(struct amba_device *amba_dev, amba_set_drvdata(amba_dev, drm); priv->drm = drm; drm->dev_private = priv; + priv->variant = variant; + + /* + * The PL110 and PL111 variants have two registers + * swapped: interrupt enable and control. For this reason + * we use offsets that we can change per variant. + */ + if (variant->is_pl110) { + /* + * The ARM Versatile boards are even more special: + * their PrimeCell ID say they are PL110 but the + * control and interrupt enable registers are anyway + * swapped to the PL111 order so they are not following + * the PL110 datasheet. + */ + if (of_machine_is_compatible("arm,versatile-ab") || + of_machine_is_compatible("arm,versatile-pb")) { + priv->ienb = CLCD_PL111_IENB; + priv->ctrl = CLCD_PL111_CNTL; + } else { + priv->ienb = CLCD_PL110_IENB; + priv->ctrl = CLCD_PL110_CNTL; + } + } else { + priv->ienb = CLCD_PL111_IENB; + priv->ctrl = CLCD_PL111_CNTL; + } priv->regs = devm_ioremap_resource(dev, &amba_dev->res); if (IS_ERR(priv->regs)) { @@ -227,10 +255,10 @@ static int pl111_amba_probe(struct amba_device *amba_dev, } /* turn off interrupts before requesting the irq */ - writel(0, priv->regs + CLCD_PL111_IENB); + writel(0, priv->regs + priv->ienb); ret = devm_request_irq(dev, amba_dev->irq[0], pl111_irq, 0, - "pl111", priv); + variant->name, priv); if (ret != 0) { dev_err(dev, "%s failed irq %d\n", __func__, ret); return ret; @@ -269,10 +297,62 @@ static int pl111_amba_remove(struct amba_device *amba_dev) return 0; } -static struct amba_id pl111_id_table[] = { +/* + * This variant exist in early versions like the ARM Integrator + * and this version lacks the 565 and 444 pixel formats. + */ +static const u32 pl110_pixel_formats[] = { + DRM_FORMAT_ABGR8888, + DRM_FORMAT_XBGR8888, + DRM_FORMAT_ARGB8888, + DRM_FORMAT_XRGB8888, + DRM_FORMAT_ABGR1555, + DRM_FORMAT_XBGR1555, + DRM_FORMAT_ARGB1555, + DRM_FORMAT_XRGB1555, +}; + +static const struct pl111_variant_data pl110_variant = { + .name = "PL110", + .is_pl110 = true, + .formats = pl110_pixel_formats, + .nformats = ARRAY_SIZE(pl110_pixel_formats), +}; + +/* RealView, Versatile Express etc use this modern variant */ +static const u32 pl111_pixel_formats[] = { + DRM_FORMAT_ABGR8888, + DRM_FORMAT_XBGR8888, + DRM_FORMAT_ARGB8888, + DRM_FORMAT_XRGB8888, + DRM_FORMAT_BGR565, + DRM_FORMAT_RGB565, + DRM_FORMAT_ABGR1555, + DRM_FORMAT_XBGR1555, + DRM_FORMAT_ARGB1555, + DRM_FORMAT_XRGB1555, + DRM_FORMAT_ABGR4444, + DRM_FORMAT_XBGR4444, + DRM_FORMAT_ARGB4444, + DRM_FORMAT_XRGB4444, +}; + +static const struct pl111_variant_data pl111_variant = { + .name = "PL111", + .formats = pl111_pixel_formats, + .nformats = ARRAY_SIZE(pl111_pixel_formats), +}; + +static const struct amba_id pl111_id_table[] = { + { + .id = 0x00041110, + .mask = 0x000fffff, + .data = (void*)&pl110_variant, + }, { .id = 0x00041111, .mask = 0x000fffff, + .data = (void*)&pl111_variant, }, {0, 0}, };