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[131.252.210.177]) by mx.google.com with ESMTPS id g7si14948087pgb.109.2019.06.11.23.56.28 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 11 Jun 2019 23:56:28 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=collabora.com Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CF22389359; Wed, 12 Jun 2019 06:55:51 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wm1-x344.google.com (mail-wm1-x344.google.com [IPv6:2a00:1450:4864:20::344]) by gabe.freedesktop.org (Postfix) with ESMTPS id A4599892AD; Wed, 12 Jun 2019 06:55:41 +0000 (UTC) Received: by mail-wm1-x344.google.com with SMTP id x15so5297884wmj.3; Tue, 11 Jun 2019 23:55:41 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :mime-version:content-transfer-encoding; bh=g5x79J1FC6x5BTtahHPXun9HXhbAycYaatHYGseEhDs=; b=P0Hgf1F+ErV8PUlnW+G16lDDfLFxPI/q5GDuY3XURNPrESrBDNROeuPpXtUsSFf4Wp rJJo02jtFGCiSXvTBFsehX2bsbK9ptR7l74HB8V+VD1y/dIkctpxw/k89hiCm09WhpEZ JsHm6kAR+E8vdTGBhvIYgV/NTy5ThWMT5S49xDkZjFeqMtBokVrAih/Z32rxR5hC4jMv ERIrzySdvoGGDnEroQX94/ySeIk0rv6LG7nwfGDMOqz1eA5L/FUJF1VFQegZZbORZiTr 3cZqG7Dq1OHW69WA8tVIwK1zv/HGHasjmFi8iQkTZzodkq9tKQHRx8kTsAVwvcDEm0p9 wnCg== X-Gm-Message-State: APjAAAVU5GhFkrkTVUI3mGIKL6XCUe3iK60j9CQYqFDkB8AJ9H3RFLhD a4mscTDy1nbz7hJHPJ9KcgnnAyGu8Kw= X-Received: by 2002:a1c:e0c4:: with SMTP id x187mr19755394wmg.177.1560322539491; Tue, 11 Jun 2019 23:55:39 -0700 (PDT) Received: from cizrna.lan ([109.72.12.69]) by smtp.gmail.com with ESMTPSA id u23sm4337132wmj.33.2019.06.11.23.55.38 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Tue, 11 Jun 2019 23:55:38 -0700 (PDT) From: Tomeu Vizoso To: Development mailing list for IGT GPU Tools Subject: [PATCH i-g-t 1/2] lib/panfrost: Add support for SFBD to igt_panfrost_trivial_job Date: Wed, 12 Jun 2019 08:55:29 +0200 Message-Id: <20190612065530.64238-1-tomeu.vizoso@collabora.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=g5x79J1FC6x5BTtahHPXun9HXhbAycYaatHYGseEhDs=; b=OhkKeDQlkMYOxsXKvHgrrneO1FrcKGuVaRTV6sfkZHf4Etfup5ps7bk2RMPS/CZ2Hc RGz5tiJlltEcCFzEfkUqrouAFIlKDf49rzk5Yfu0zFjoOrM3k6c1OzHOVXlOhxr0HgYm 3SbbkiSSJ36W+4XMrE0FvtrAwD9TX14sMhnXfIoWMoy97j0krYsNWiYxH54SttSSkHuQ 98yU4ZlLNKH0pXfzgCJ9UBdcpH86uH/2evTO6KYw6PWzbVsOP+whU6Pbio/HkrPZgoFZ +9dH7YTNpy9qpX5/P8Jz9UUTWa6mH2XyqlQ0lUERcPQg6B6vvIXM9qFZm5WWPjCtrD33 sN1A== X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tomeu Vizoso , dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" T720 GPUs and older don't have support for MFBD, so use the SFBD structs instead. We don't know yet how to hang the GPU with SFBD descriptors, so for now skip that test. Signed-off-by: Tomeu Vizoso --- lib/igt_panfrost.c | 71 +++++++++++++++++++++++++++++++++------------- lib/igt_panfrost.h | 2 +- 2 files changed, 53 insertions(+), 20 deletions(-) diff --git a/lib/igt_panfrost.c b/lib/igt_panfrost.c index 1046c8260552..8b0c2b7743ea 100644 --- a/lib/igt_panfrost.c +++ b/lib/igt_panfrost.c @@ -127,22 +127,19 @@ void igt_panfrost_bo_mmap(int fd, struct panfrost_bo *bo) igt_assert(bo->map); } -/* TODO: Make this more generic so it works on GPUs other than T760 */ struct panfrost_submit *igt_panfrost_trivial_job(int fd, bool do_crash, int width, int height, uint32_t color) { struct panfrost_submit *submit; struct mali_job_descriptor_header header = { .job_type = JOB_TYPE_FRAGMENT, .job_index = 1, -#ifdef __LP64__ .job_descriptor_size = 1, -#endif }; struct mali_payload_fragment payload = { .min_tile_coord = MALI_COORDINATE_TO_TILE_MIN(0, 0), .max_tile_coord = MALI_COORDINATE_TO_TILE_MAX(ALIGN(width, 16), height), }; - struct bifrost_framebuffer framebuffer = { + struct bifrost_framebuffer mfbd_framebuffer = { .unk0 = 0x0, .unknown1 = 0x0, .tiler_meta = 0xff00000000, @@ -159,6 +156,20 @@ struct panfrost_submit *igt_panfrost_trivial_job(int fd, bool do_crash, int widt .clear_depth = 0.000000, .unknown2 = 0x1f, }; + struct mali_single_framebuffer sfbd_framebuffer = { + .unknown2 = 0x1f, + .width = MALI_POSITIVE(width), + .height = MALI_POSITIVE(height), + .stride = width * 4, + .resolution_check = ((width + height) / 3) << 4, + .tiler_flags = 0xfff, + .clear_color_1 = color, + .clear_color_2 = color, + .clear_color_3 = color, + .clear_color_4 = color, + .clear_flags = 0x101100 | MALI_CLEAR_SLOW, + .format = 0xb84e0281, + }; struct mali_rt_format fmt = { .unk1 = 0x4000000, .unk2 = 0x1, @@ -179,31 +190,53 @@ struct panfrost_submit *igt_panfrost_trivial_job(int fd, bool do_crash, int widt .clear_color_3 = color, .clear_color_4 = color, }; + int gpu_prod_id = igt_panfrost_get_param(fd, DRM_PANFROST_PARAM_GPU_PROD_ID); + uint32_t *known_unknown; uint32_t *bos; submit = malloc(sizeof(*submit)); submit->fbo = igt_panfrost_gem_new(fd, ALIGN(width, 16) * height * 4); rts.framebuffer = submit->fbo->offset; + sfbd_framebuffer.framebuffer = submit->fbo->offset; - submit->tiler_heap_bo = igt_panfrost_gem_new(fd, 32768 * 4096); - framebuffer.tiler_heap_start = submit->tiler_heap_bo->offset; - framebuffer.tiler_heap_end = submit->tiler_heap_bo->offset + 32768 * 4096; + submit->tiler_heap_bo = igt_panfrost_gem_new(fd, 32768 * 128); + mfbd_framebuffer.tiler_heap_start = submit->tiler_heap_bo->offset; + mfbd_framebuffer.tiler_heap_end = submit->tiler_heap_bo->offset + 32768 * 128; + sfbd_framebuffer.tiler_heap_free = mfbd_framebuffer.tiler_heap_start; + sfbd_framebuffer.tiler_heap_end = mfbd_framebuffer.tiler_heap_end; - submit->tiler_scratch_bo = igt_panfrost_gem_new(fd, 128 * 128 * 4096); - framebuffer.tiler_scratch_start = submit->tiler_scratch_bo->offset; - framebuffer.tiler_scratch_middle = submit->tiler_scratch_bo->offset + 0xf0000; + submit->tiler_scratch_bo = igt_panfrost_gem_new(fd, 128 * 128 * 128); + mfbd_framebuffer.tiler_scratch_start = submit->tiler_scratch_bo->offset; + mfbd_framebuffer.tiler_scratch_middle = submit->tiler_scratch_bo->offset + 0xf0000; + sfbd_framebuffer.unknown_address_0 = mfbd_framebuffer.tiler_scratch_start; submit->scratchpad_bo = igt_panfrost_gem_new(fd, 64 * 4096); - framebuffer.scratchpad = submit->scratchpad_bo->offset; - - submit->fb_bo = igt_panfrost_gem_new(fd, sizeof(framebuffer) + sizeof(struct bifrost_render_target)); - igt_panfrost_bo_mmap(fd, submit->fb_bo); - memcpy(submit->fb_bo->map, &framebuffer, sizeof(framebuffer)); - memcpy(submit->fb_bo->map + sizeof(framebuffer), &rts, sizeof(struct bifrost_render_target)); - payload.framebuffer = submit->fb_bo->offset | MALI_MFBD; - - submit->submit_bo = igt_panfrost_gem_new(fd, sizeof(header) + sizeof(payload)); + igt_panfrost_bo_mmap(fd, submit->scratchpad_bo); + mfbd_framebuffer.scratchpad = submit->scratchpad_bo->offset; + sfbd_framebuffer.unknown_address_1 = submit->scratchpad_bo->offset; + sfbd_framebuffer.unknown_address_2 = submit->scratchpad_bo->offset + 512; + + known_unknown = ((void*)submit->scratchpad_bo->map) + 512; + *known_unknown = 0xa0000000; + + if (gpu_prod_id >= 0x0750) { + submit->fb_bo = igt_panfrost_gem_new(fd, sizeof(mfbd_framebuffer) + sizeof(struct bifrost_render_target)); + igt_panfrost_bo_mmap(fd, submit->fb_bo); + memcpy(submit->fb_bo->map, &mfbd_framebuffer, sizeof(mfbd_framebuffer)); + memcpy(submit->fb_bo->map + sizeof(mfbd_framebuffer), &rts, sizeof(struct bifrost_render_target)); + payload.framebuffer = submit->fb_bo->offset | MALI_MFBD; + } else { + // We don't know yet how to cause a hang on <=T720 + // Should probably use an infinite loop to hang the GPU + igt_require(!do_crash); + submit->fb_bo = igt_panfrost_gem_new(fd, sizeof(sfbd_framebuffer)); + igt_panfrost_bo_mmap(fd, submit->fb_bo); + memcpy(submit->fb_bo->map, &sfbd_framebuffer, sizeof(sfbd_framebuffer)); + payload.framebuffer = submit->fb_bo->offset | MALI_SFBD; + } + + submit->submit_bo = igt_panfrost_gem_new(fd, sizeof(header) + sizeof(payload) + 1024000); igt_panfrost_bo_mmap(fd, submit->submit_bo); memcpy(submit->submit_bo->map, &header, sizeof(header)); diff --git a/lib/igt_panfrost.h b/lib/igt_panfrost.h index a33327e39736..cc7998dcb4bf 100644 --- a/lib/igt_panfrost.h +++ b/lib/igt_panfrost.h @@ -29,7 +29,7 @@ struct panfrost_bo { int handle; - uint32_t offset; + uint64_t offset; uint32_t size; void *map; };