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Wed, 11 Nov 2020 10:36:06 -0800 (PST) Received: from dell.default ([91.110.221.159]) by smtp.gmail.com with ESMTPSA id k84sm3558311wmf.42.2020.11.11.10.36.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Nov 2020 10:36:05 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 12/19] drm/radeon/evergreen: Move 'si_get_csb_*()'s prototypes to shared header Date: Wed, 11 Nov 2020 18:35:38 +0000 Message-Id: <20201111183545.1756994-13-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201111183545.1756994-1-lee.jones@linaro.org> References: <20201111183545.1756994-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Airlie , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6?= =?utf-8?q?nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/radeon/si.c:5678:5: warning: no previous prototype for ‘si_get_csb_size’ [-Wmissing-prototypes] 5678 | u32 si_get_csb_size(struct radeon_device *rdev) | ^~~~~~~~~~~~~~~ drivers/gpu/drm/radeon/si.c:5710:6: warning: no previous prototype for ‘si_get_csb_buffer’ [-Wmissing-prototypes] 5710 | void si_get_csb_buffer(struct radeon_device *rdev, volatile u32 *buffer) | ^~~~~~~~~~~~~~~~~ Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- drivers/gpu/drm/radeon/evergreen.c | 3 +-- drivers/gpu/drm/radeon/si.h | 2 ++ 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 28830f4ef95e3..d8ee80ad4ea44 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -41,6 +41,7 @@ #include "radeon_asic.h" #include "radeon_audio.h" #include "radeon_ucode.h" +#include "si.h" #define DC_HPDx_CONTROL(x) (DC_HPD1_CONTROL + (x * 0xc)) #define DC_HPDx_INT_CONTROL(x) (DC_HPD1_INT_CONTROL + (x * 0xc)) @@ -218,8 +219,6 @@ void evergreen_pcie_gen2_enable(struct radeon_device *rdev); void evergreen_program_aspm(struct radeon_device *rdev); void cik_init_cp_pg_table(struct radeon_device *rdev); -extern u32 si_get_csb_size(struct radeon_device *rdev); -extern void si_get_csb_buffer(struct radeon_device *rdev, volatile u32 *buffer); extern u32 cik_get_csb_size(struct radeon_device *rdev); extern void cik_get_csb_buffer(struct radeon_device *rdev, volatile u32 *buffer); diff --git a/drivers/gpu/drm/radeon/si.h b/drivers/gpu/drm/radeon/si.h index f483a64d17050..310c58376f927 100644 --- a/drivers/gpu/drm/radeon/si.h +++ b/drivers/gpu/drm/radeon/si.h @@ -32,5 +32,7 @@ u32 si_gpu_check_soft_reset(struct radeon_device *rdev); void si_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc); void si_rlc_reset(struct radeon_device *rdev); void si_init_uvd_internal_cg(struct radeon_device *rdev); +u32 si_get_csb_size(struct radeon_device *rdev); +void si_get_csb_buffer(struct radeon_device *rdev, volatile u32 *buffer); #endif /* __SI_H__ */