From patchwork Tue Nov 16 06:22:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Koul X-Patchwork-Id: 519184 Delivered-To: patch@linaro.org Received: by 2002:ac0:c605:0:0:0:0:0 with SMTP id p5csp6710724imj; Mon, 15 Nov 2021 22:24:02 -0800 (PST) X-Google-Smtp-Source: ABdhPJxVGTw3YGMiZVxHItBGT701z9o3oih3vQTHBF3baSnM7za+DKfw8z6VVd0JyYEwOImFnNjY X-Received: by 2002:a63:5023:: with SMTP id e35mr3227300pgb.284.1637043842058; Mon, 15 Nov 2021 22:24:02 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1637043842; cv=none; d=google.com; s=arc-20160816; b=StrAYJe76HgRaC+jCBXHk/ffUnqLZ7AIOdIYiqETDayQZomKtKNLWtv4N8zkkxVEV2 dCZVTJJ8M/KYk6VmRVrrr/xmNPu6fLpBHo1Kw2rXyv7FZVeAXr7MwhlGUPq6KYIWPCMm yRQuoyl8zdhJF/COZChkGv6TmBjwINxLTfRq2lEP6xsYJeDMjfv3UNn5/dxWIz96Xoqo 8s+GABso+HNc1fq3kmTK4ton478o8pg7AT1idEf3DXa7VAQe9AqqIKVFDffEv3gH7xWD 5/heBbetySK0o9xrOrhpUKaUtbcB2F77i3GcvvL9lIRRiW7QVNB75Ag/KknppaMbwENZ eKGg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature:delivered-to; bh=gBhTwwxMD+vctN4p+UFTB5bLVWAxf39LLzfJGzbEfkU=; b=uY8qyBKCvb4Bo54e76f0B7aqgAm/P6AXyiK+MyqAG8sK+XGlzizcmywlYKzgWhjkdd RGUskIoSB11Di3l9v5PH1zkwLimplBtUPe7hO+qPQyr36UXpKTRZ5x0FEe10zFQvMXIl cYWXEQeXBggZx2qZ9JkSWHngNJC671mMnibwvZnNEQnaepd9ZhYDlQmvKwAxDpYDIBHk VH31KSa1lSQOiq5zNGtRRluSfp4usjvD+KKpr94w3rXFNBsU8+aEex6I8dtk7rCgG+TE 1CdHwgzmT3SQ5wLpRvlx+7ceacAPqypPo2G1w+n6LEB6LjLIXk2KsQctK/v64nr/6a+D /f/A== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@kernel.org header.s=k20201202 header.b=cFIOEsci; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id d3si37995303pgn.238.2021.11.15.22.24.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Nov 2021 22:24:02 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; dkim=fail header.i=@kernel.org header.s=k20201202 header.b=cFIOEsci; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id ECDA56ED64; Tue, 16 Nov 2021 06:23:59 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by gabe.freedesktop.org (Postfix) with ESMTPS id 12AF26ED9D; Tue, 16 Nov 2021 06:23:59 +0000 (UTC) Received: by mail.kernel.org (Postfix) with ESMTPSA id 757936115B; Tue, 16 Nov 2021 06:23:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1637043838; bh=fElGn9Ik84lBDayR/MYhHLK/K1CaX6s6acUo7on5lyw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cFIOEsciCj+AUKKqzriLHLyGfIPSxeL/7QNt3hsTKwo436Ph1+7GPW6PV01mNwq4+ mXwZypyzDDl46bi5FMoghMWaVOwmH5Sf2+oWJ1UXCAk05dinaT5xxUHJpVfnHqJPyW DuCbaBudv4Tm1u1W+41chBifIyPxw+KAzhdKmvR1AXNf51flw1Ld4VaQFXslsjINLP US/o3fIvzOFo6Lb55d7d8pliXyG46H8Noc+XvVCrf/BqGY9p+U18sibWtOoBmQzyao p2aJ0J6ZBaExdFAQiWUk7YKrs54LR3BHwW50dHY+ZI9AJwtc0XjHQeFQlUoDBpLMQX 5zrSc5K8sA0Mw== From: Vinod Koul To: Rob Clark Subject: [PATCH v3 09/13] drm/msm/disp/dpu1: Add support for DSC in topology Date: Tue, 16 Nov 2021 11:52:52 +0530 Message-Id: <20211116062256.2417186-10-vkoul@kernel.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20211116062256.2417186-1-vkoul@kernel.org> References: <20211116062256.2417186-1-vkoul@kernel.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jonathan Marek , Jeffrey Hugo , David Airlie , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Abhinav Kumar , Bjorn Andersson , Vinod Koul , dri-devel@lists.freedesktop.org, Dmitry Baryshkov , freedreno@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" For DSC to work we typically need a 2,2,1 configuration. This should suffice for resolutions up to 4k. For more resolutions like 8k this won't work. Also, it is better to use 2 LMs and DSC instances as half width results in lesser power consumption as compared to single LM, DSC at full width. The panel has been tested only with 2,2,1 configuration, so for now we blindly create 2,2,1 topology when DSC is enabled Co-developed-by: Abhinav Kumar Signed-off-by: Abhinav Kumar Signed-off-by: Vinod Koul --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 18 ++++++++++++++++++ drivers/gpu/drm/msm/msm_drv.h | 2 ++ 2 files changed, 20 insertions(+) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index f2ff8a504918..12f58de88ac7 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -533,6 +533,8 @@ static struct msm_display_topology dpu_encoder_get_topology( struct drm_display_mode *mode) { struct msm_display_topology topology = {0}; + struct drm_encoder *drm_enc; + struct msm_drm_private *priv; int i, intf_count = 0; for (i = 0; i < MAX_PHYS_ENCODERS_PER_VIRTUAL; i++) @@ -567,8 +569,24 @@ static struct msm_display_topology dpu_encoder_get_topology( topology.num_enc = 0; topology.num_intf = intf_count; + drm_enc = &dpu_enc->base; + priv = drm_enc->dev->dev_private; + if (priv && priv->dsc) { + /* In case of Display Stream Compression DSC, we would use + * 2 encoders, 2 line mixers and 1 interface + * this is power optimal and can drive up to (including) 4k + * screens + */ + topology.num_enc = 2; + topology.num_dsc = 2; + topology.num_intf = 1; + topology.num_lm = 2; + priv->dsc->dsc_mask = BIT(0) | BIT(1); + } + return topology; } + static int dpu_encoder_virt_atomic_check( struct drm_encoder *drm_enc, struct drm_crtc_state *crtc_state, diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h index c4a588ad226e..d6b25d77700e 100644 --- a/drivers/gpu/drm/msm/msm_drv.h +++ b/drivers/gpu/drm/msm/msm_drv.h @@ -103,12 +103,14 @@ enum msm_event_wait { * @num_enc: number of compression encoder blocks used * @num_intf: number of interfaces the panel is mounted on * @num_dspp: number of dspp blocks used + * @num_dsc: number of Display Stream Compression (DSC) blocks used */ struct msm_display_topology { u32 num_lm; u32 num_enc; u32 num_intf; u32 num_dspp; + u32 num_dsc; }; /**