From patchwork Thu Dec 21 11:02:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 122537 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp726126qgn; Thu, 21 Dec 2017 03:04:10 -0800 (PST) X-Google-Smtp-Source: ACJfBoslP9zhBLvKGVcxifwmIDMMTzaJdEkGAOv/e/Z17hw7OFkcw7XwSGAGSFz8/LP5vnobmpXx X-Received: by 10.99.55.23 with SMTP id e23mr1807930pga.156.1513854250641; Thu, 21 Dec 2017 03:04:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1513854250; cv=none; d=google.com; s=arc-20160816; b=qEQX6Tv58nqNDPxVB64s+qPcZITaYtXEDjlo4D84tmnT1nBz6gm+v1EPmX4TLEhIp4 IiKzt7bLEZBASm+O5wCBCYAZd8shyY9T39BI6GMvofHwaTSd/dsqUHEym1CUImFfiARe 0gN0Q6qjw5KV3RMZJ5yUfOJMoPtrlOidE72yt0b8RQWvSmxMAYnvjV1vtFNO60ZDSlV7 gOj+vhadyqOYIYe9E333Z2nUP4mgVQznb97Q4Oq+IKOaMa8mxmKQ5w8SpsXPkUuWlCR1 oY2UtoAXvNSufYSFr5geQ1kSeb5EYUwUcLk8qnf6hzvUJ6ubJ/1pZlo9xdew3FLU9fyt Imbg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:references:in-reply-to :message-id:date:subject:to:from:delivered-to :arc-authentication-results; bh=7pzuPYkPzeqia9I/2Qq86oIfVyFcYSUvcYEXiflehmg=; b=XE7nHn6WOJo+TmMhJiUx1kuliLwmwsplevp+SJ64aHKpziURywJQrAs6MASLCMxlqN Ufpg5FbP8xdp14CRhumVoF6uLwEVIeKia7g8tsHkn7Dn3vITIk9gBwAojAV+XPvwRqZw vsYfiXUefbLJo33Si36NeEY1pTqnFYduUDgHjjmgHWgFy1q8cb/7/0JzrO96IRjs5omo Ldji9iSzB1TQ2Z8bxOs24NnyUbbook5f2wbULa7pnpfafCILZMbg9XpLyza/wjqjwkzR MkF6hx4rZR64m8PADsZLPNzds9ji/BiW7E1Dtmyd2JC2FDwoiDrvswHbQY8upTiCIz8X cT4Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id u84si7580269pgb.823.2017.12.21.03.04.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 21 Dec 2017 03:04:10 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7850C6E623; Thu, 21 Dec 2017 11:03:12 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id 0F8006E60E for ; Thu, 21 Dec 2017 11:03:04 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id C05B9209D3; Thu, 21 Dec 2017 12:03:02 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 5A298207CA; Thu, 21 Dec 2017 12:02:44 +0100 (CET) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH v5 04/12] dt-bindings: display: sun4i-drm: Add A83T pipeline Date: Thu, 21 Dec 2017 12:02:30 +0100 Message-Id: <2702a5c1d224af1c51743492ad1b917966f2ad43.1513854122.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , jernej.skrabec@siol.net, plaes@plaes.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Rob Herring , thierry.reding@gmail.com, Laurent Pinchart , linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The A83T has two video pipelines in parallel that looks quite similar to the other SoCs. The video planes are handled through a controller called the mixer, and the video signal is then passed to the timing controller (TCON). And while there is two instances of the mixers and TCONs, they have a significant number of differences. The TCONs are quite easy to deal with, one is supposed to generate TV (in the broader term, so including things like HDMI) signals, the other one LCD (so RGB, LVDS, DSI) signals. And while they are called TCON0 and TCON1 in the A83t datasheet, newer SoCs call them TCON-TV and TCON-LCD, which seems more appropriate. However, the mixers differ mostly by their capabilities, with some features being available only in the first one, or the number of planes they expose, but also through their register layout. And while the capabilities could be represented as properties, the register layout differences would need to express all the registers offsets as properties, which is usually quite bad. Especially since documentation on that hardware block is close to non-existant and we don't even have the list of all those registers in the first place. So let's call them mixer 0 and 1 in our compatibles, even though the name is pretty bad... At the moment, we only have tested the code on a board that has a single display output, so we're leaving the tcon-tv and mixer1 out. Reviewed-by: Rob Herring Reviewed-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt index 1e21cfaac9e2..9f073af4c711 100644 --- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt +++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt @@ -93,6 +93,7 @@ Required properties: * allwinner,sun6i-a31s-tcon * allwinner,sun7i-a20-tcon * allwinner,sun8i-a33-tcon + * allwinner,sun8i-a83t-tcon-lcd * allwinner,sun8i-v3s-tcon - reg: base address and size of memory-mapped region - interrupts: interrupt associated to this IP @@ -225,6 +226,7 @@ supported. Required properties: - compatible: value must be one of: + * allwinner,sun8i-a83t-de2-mixer-0 * allwinner,sun8i-v3s-de2-mixer - reg: base address and size of the memory-mapped region. - clocks: phandles to the clocks feeding the mixer @@ -254,6 +256,7 @@ Required properties: * allwinner,sun6i-a31s-display-engine * allwinner,sun7i-a20-display-engine * allwinner,sun8i-a33-display-engine + * allwinner,sun8i-a83t-display-engine * allwinner,sun8i-v3s-display-engine - allwinner,pipelines: list of phandle to the display engine