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Fri, 3 Jun 2016 09:35:54 +0100 From: James Greenhalgh To: CC: , , Subject: [AArch64] Give some new costs for Cortex-A57 floating-point operations Date: Fri, 3 Jun 2016 09:35:50 +0100 Message-ID: <1464942950-29272-1-git-send-email-james.greenhalgh@arm.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:217.140.96.140; IPV:CAL; SCL:-1; CTRY:GB; EFV:NLI; SFV:NSPM; SFS:(10009020)(6009001)(2980300002)(438002)(199003)(377424004)(189002)(586003)(11100500001)(4610100001)(189998001)(92566002)(36756003)(8936002)(568964002)(5008740100001)(5003600100002)(87936001)(8676002)(4326007)(86362001)(6806005)(2906002)(104016004)(19580395003)(512874002)(110136002)(15975445007)(19580405001)(77096005)(33646002)(450100001)(106466001)(84326002)(50986999)(229853001)(2351001)(50226002)(5890100001)(2476003); DIR:OUT; SFP:1101; SCL:1; SRVR:AM3PR08MB0022; H:nebula.arm.com; FPR:; SPF:Pass; MLV:sfv; A:1; MX:1; LANG:en; X-Microsoft-Exchange-Diagnostics: 1; DB3FFO11FD020; 1:nGwlN0UcLPu/IjMX+7Tqj7Hgx9UL9zJcq61DrwEwfY/RUfpF2e+uw7sPVOv9CLba7wDaEtXZuYhMofNKNqMi5fgkpFrv0iICWyvSmkYlqZAiKaVDif2Dgz4LKWq+8ekxZgNKieTxDoDdbqotyNTDaTqaiGU1g2Z/UoUp0GHfi+sHWb4ifx3jpNqfqzUqLbDJxGxpFYLyeEJ43fRll2gAM2OIWjwcnNV2FNA/UeCP7vLCYz8JK1ASmf4AXiQtfD/NRNAJlZI4Cu5vw/Ip6wUdIGAUweOTqel0i3BULRbTuU/AHOJyWFFgRHi22Mh/ufGryUxdDMB41Veou7W1snQs+QpUpX0RbsoRT0RQX9onATAKylz6z6l8Zg4cCf5N2Pe3Ar5SEqTms9jE16W1M15kOhN8ntkkTv1yziLkwUq2J+af45TagHTdTNbBK2g+u/szOzF7WaByb0fHUu124yZJnrtzZWEvsR/sOEpn0fSd+JIWK56WjkYJGhOjEPSg/2zi X-MS-Office365-Filtering-Correlation-Id: 2fb6fb56-2a67-4495-a950-08d38b8a153e X-Microsoft-Exchange-Diagnostics: 1; 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Ip=[217.140.96.140]; Helo=[nebula.arm.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM3PR08MB0022 X-MC-Unique: oeMZ7k8vRFKOUA74TejXUQ-1 X-IsSubscribed: yes Hi, This patch rebases the floating-point cost table for Cortex-A57 to be relative to the cost of a floating-point move. This in response to this feedback from Richard Sandiford [2] on Ramana's patch to calls.c [1] from 2014: I think this is really a bug in the backend. The backend is assigning a cost of COSTS_N_INSNS (3) to a floating-point constant not because the constant itself is expensive -- it's actually as cheap as a register in this context -- but because the backend considers floating-point moves to be 3 times more expensive than cheap integer moves. The argument is that a move in mode X should be treated with cost COSTS_N_INSNS (1), and other instructions should have a cost relative to that move. For example, in this patch we say that instructions building a floating-point constant are the same cost as a floating-point register to register move. Fixing this fixes the issue Ramana was seeing, in a way consistent with what other back-ends do. This patch gives a small improvement to Spec2000FP on a Cortex-A57 platform. Bootstrapped on aarch64-none-linux-gnu with no issues. OK? Thanks, James --- 2016-06-03 James Greenhalgh * config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Make FP costs relative to the cost of a register move. [1] https://gcc.gnu.org/ml/gcc-patches/2014-10/msg00136.html [2] https://gcc.gnu.org/ml/gcc-patches/2014-10/msg00391.html diff --git a/gcc/config/arm/aarch-cost-tables.h b/gcc/config/arm/aarch-cost-tables.h index c971b30..5f42253 100644 --- a/gcc/config/arm/aarch-cost-tables.h +++ b/gcc/config/arm/aarch-cost-tables.h @@ -294,35 +294,35 @@ const struct cpu_cost_table cortexa57_extra_costs = { /* FP SFmode */ { - COSTS_N_INSNS (17), /* div. */ - COSTS_N_INSNS (5), /* mult. */ - COSTS_N_INSNS (9), /* mult_addsub. */ - COSTS_N_INSNS (9), /* fma. */ - COSTS_N_INSNS (4), /* addsub. */ - COSTS_N_INSNS (2), /* fpconst. */ - COSTS_N_INSNS (2), /* neg. */ - COSTS_N_INSNS (2), /* compare. */ - COSTS_N_INSNS (4), /* widen. */ - COSTS_N_INSNS (4), /* narrow. */ - COSTS_N_INSNS (4), /* toint. */ - COSTS_N_INSNS (4), /* fromint. */ - COSTS_N_INSNS (4) /* roundint. */ + COSTS_N_INSNS (6), /* div. */ + COSTS_N_INSNS (1), /* mult. */ + COSTS_N_INSNS (2), /* mult_addsub. */ + COSTS_N_INSNS (2), /* fma. */ + COSTS_N_INSNS (1), /* addsub. */ + 0, /* fpconst. */ + 0, /* neg. */ + 0, /* compare. */ + COSTS_N_INSNS (1), /* widen. */ + COSTS_N_INSNS (1), /* narrow. */ + COSTS_N_INSNS (1), /* toint. */ + COSTS_N_INSNS (1), /* fromint. */ + COSTS_N_INSNS (1) /* roundint. */ }, /* FP DFmode */ { - COSTS_N_INSNS (31), /* div. */ - COSTS_N_INSNS (5), /* mult. */ - COSTS_N_INSNS (9), /* mult_addsub. */ - COSTS_N_INSNS (9), /* fma. */ - COSTS_N_INSNS (4), /* addsub. */ - COSTS_N_INSNS (2), /* fpconst. */ - COSTS_N_INSNS (2), /* neg. */ - COSTS_N_INSNS (2), /* compare. */ - COSTS_N_INSNS (4), /* widen. */ - COSTS_N_INSNS (4), /* narrow. */ - COSTS_N_INSNS (4), /* toint. */ - COSTS_N_INSNS (4), /* fromint. */ - COSTS_N_INSNS (4) /* roundint. */ + COSTS_N_INSNS (11), /* div. */ + COSTS_N_INSNS (1), /* mult. */ + COSTS_N_INSNS (2), /* mult_addsub. */ + COSTS_N_INSNS (2), /* fma. */ + COSTS_N_INSNS (1), /* addsub. */ + 0, /* fpconst. */ + 0, /* neg. */ + 0, /* compare. */ + COSTS_N_INSNS (1), /* widen. */ + COSTS_N_INSNS (1), /* narrow. */ + COSTS_N_INSNS (1), /* toint. */ + COSTS_N_INSNS (1), /* fromint. */ + COSTS_N_INSNS (1) /* roundint. */ } }, /* Vector */