From patchwork Fri Nov 16 15:47:40 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Christophe Lyon X-Patchwork-Id: 151360 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp589320ljp; Fri, 16 Nov 2018 07:52:34 -0800 (PST) X-Google-Smtp-Source: AJdET5d8EDFNEP44ryUbfbTIjqJuEkQgIAa/w/pd8pplcyEe/ETiTkrHU03lfuzmj+K3kY/WY1sS X-Received: by 2002:a17:902:b103:: with SMTP id q3-v6mr11422296plr.83.1542383554539; Fri, 16 Nov 2018 07:52:34 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542383554; cv=none; d=google.com; s=arc-20160816; b=OoAXH36mQquGQJNV9EmK2B3KwJAf6j0JG3dwC4OKKg5k+k8w36fsicJOYli0PcVJml g02UgD7VyvHAB43o3Mn8a7m4Jb1E18NbodLIgG5sYWOwj03hw/kHtBGz2HtzWdfOFKFc 2MwZSiG5hrpDjGf7gMTrLUlKpXvDM9qYQklhEr1PegeaSzy1qFDvkq4yrW8uztXjkjFq w+WFjn4l83qEwLyRm+1VTfjWiSqLRc70uX6caALvuiwXdQjK81iCSf947zH8/rSKysq0 7wKE4ljEyNZJ6p5FiwactIzLs0qMROk3cCpMUMyw4MCAz1Z698IU2ZElwS57CQPHBv9H g9NQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:delivered-to:sender:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence :mailing-list:dkim-signature:domainkey-signature; bh=JojYzwZplUfWBd9fNbYvfNjLNQMeKm1ACWqlpjUAGfI=; b=lXW5Qd4g9eGmw6cmnSIuevekFUqbsIqd2uDzrAEpJDPCAFUeAE2opp1VFEF04QNZHd 4xQTMwCJSz5ozkJmx6iDSr0GPJ4YjS3f7yJBsiZUqHcfm+1Tfd6YxMBMjZAgOQGry5Eq /6+nEObYOpOBo/JH8rg4ebpDHAJnMm+9eyjD23fXShAdRiOZoIZ4jSYZcyf3/EPmffc/ 31Qa9EFf61T1aRQ6aSin6Ke2J+X4tNWOg8gHyfCjIXz0LT4VnG/Z7176YURxx2DtJKQN 0ARw21z15hLQ6F/wWJ9RKcGKULW9JAIil/Gy0F/eFYOrJkBcc2YmWayjNgkCkg+M+ulO 3pLw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=uN7jM8ga; spf=pass (google.com: domain of gcc-patches-return-490275-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom="gcc-patches-return-490275-patch=linaro.org@gcc.gnu.org" Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id 37si29912039pgs.447.2018.11.16.07.52.34 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 16 Nov 2018 07:52:34 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-return-490275-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=uN7jM8ga; spf=pass (google.com: domain of gcc-patches-return-490275-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom="gcc-patches-return-490275-patch=linaro.org@gcc.gnu.org" DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type:content-transfer-encoding; q=dns; s= default; b=FyrO6V3MGkxD6lh4eCJ/QiMgpNAuetdbr0ICYDms3uuiX3Luqv5Nx Y5tHfhpJdwjzYHn9NmDqXlEq9vPXTJN9rf6dD4f4soUm357MvUedqtdwtwdhFSMq BK6bgqRsLsvFIj+tD+PoiGmChBi/hOG81nsBtmvE5qdC6IPEW+UFpo= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type:content-transfer-encoding; s=default; bh=A+/nwgQ2UBkHJNXumMmXWz2zAc8=; b=uN7jM8ga9prMSPjmCXNIhoVzS+0W YRQeHjC3IrzRm9dQq1YcNXqEDIDDmlHCgyIIZun6hy+s3fQb0/frqS/Ogu9C+oQe KD5CwuZjR8+tdPWvHimLDEE1DhCD0a92QceApR/bmU12YTtHDO+pZ60vmn31mXW2 i4jtCfeSv6iWhn4= Received: (qmail 15102 invoked by alias); 16 Nov 2018 15:52:20 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 15071 invoked by uid 89); 16 Nov 2018 15:52:20 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-27.6 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mx07-00178001.pphosted.com Received: from mx07-00178001.pphosted.com (HELO mx07-00178001.pphosted.com) (62.209.51.94) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 16 Nov 2018 15:52:19 +0000 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id wAGFilX5002140; Fri, 16 Nov 2018 16:52:16 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2nsx068wdk-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 16 Nov 2018 16:52:16 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 720C734; Fri, 16 Nov 2018 15:52:16 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag5node1.st.com [10.75.127.13]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 5E30D501D; Fri, 16 Nov 2018 15:52:16 +0000 (GMT) Received: from gnb.st.com (10.75.127.45) by SFHDAG5NODE1.st.com (10.75.127.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Fri, 16 Nov 2018 16:52:15 +0100 From: Christophe Lyon To: CC: Subject: [ARM/FDPIC v4 12/20] [ARM] FDPIC: Restore r9 after we call __aeabi_read_tp Date: Fri, 16 Nov 2018 16:47:40 +0100 Message-ID: <20181116154808.25154-13-christophe.lyon@st.com> In-Reply-To: <20181116154808.25154-1-christophe.lyon@st.com> References: <20181116154808.25154-1-christophe.lyon@st.com> MIME-Version: 1.0 X-IsSubscribed: yes We call __aeabi_read_tp() to get the thread pointer. Since this is a function call, we have to restore the FDPIC register afterwards. 2018-XX-XX Christophe Lyon Mickaël Guêné gcc/ * config/arm/arm.c (arm_load_tp): Add FDPIC support. * config/arm/arm.md (load_tp_soft_fdpic): New pattern. (load_tp_soft): Disable in FDPIC mode. -- 2.6.3 diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 47e8203..f2df815 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -8657,7 +8657,25 @@ arm_load_tp (rtx target) rtx tmp; - emit_insn (gen_load_tp_soft ()); + if (TARGET_FDPIC) + { + rtx par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (3)); + rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM); + rtx initial_fdpic_reg = get_hard_reg_initial_val (Pmode, FDPIC_REGNUM); + + emit_insn (gen_load_tp_soft_fdpic ()); + + /* Restore r9. */ + XVECEXP (par, 0, 0) = gen_rtx_UNSPEC (VOIDmode, + gen_rtvec (2, fdpic_reg, + initial_fdpic_reg), + UNSPEC_PIC_RESTORE); + XVECEXP (par, 0, 1) = gen_rtx_USE (VOIDmode, initial_fdpic_reg); + XVECEXP (par, 0, 2) = gen_rtx_CLOBBER (VOIDmode, fdpic_reg); + emit_insn (par); + } + else + emit_insn (gen_load_tp_soft ()); tmp = gen_rtx_REG (SImode, R0_REGNUM); emit_move_insn (target, tmp); diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 1200886..c6b4461 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -11485,12 +11485,25 @@ ) ;; Doesn't clobber R1-R3. Must use r0 for the first operand. +(define_insn "load_tp_soft_fdpic" + [(set (reg:SI 0) (unspec:SI [(const_int 0)] UNSPEC_TLS)) + (clobber (reg:SI 9)) + (clobber (reg:SI LR_REGNUM)) + (clobber (reg:SI IP_REGNUM)) + (clobber (reg:CC CC_REGNUM))] + "TARGET_SOFT_TP && TARGET_FDPIC" + "bl\\t__aeabi_read_tp\\t@ load_tp_soft" + [(set_attr "conds" "clob") + (set_attr "type" "branch")] +) + +;; Doesn't clobber R1-R3. Must use r0 for the first operand. (define_insn "load_tp_soft" [(set (reg:SI 0) (unspec:SI [(const_int 0)] UNSPEC_TLS)) (clobber (reg:SI LR_REGNUM)) (clobber (reg:SI IP_REGNUM)) (clobber (reg:CC CC_REGNUM))] - "TARGET_SOFT_TP" + "TARGET_SOFT_TP && !TARGET_FDPIC" "bl\\t__aeabi_read_tp\\t@ load_tp_soft" [(set_attr "conds" "clob") (set_attr "type" "branch")]