From patchwork Fri Oct 18 19:48:43 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Richard Earnshaw \(lists\)" X-Patchwork-Id: 176952 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp1293216ocf; Fri, 18 Oct 2019 12:56:34 -0700 (PDT) X-Google-Smtp-Source: APXvYqzUQcLdGNCUq5NeNgIgh632EfjRlaL+pPyWzGt4gLpwRdmSP5D/KYSXy0r5qZkQIJy3onGh X-Received: by 2002:a50:ce16:: with SMTP id y22mr11551633edi.293.1571428593882; Fri, 18 Oct 2019 12:56:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571428593; cv=none; d=google.com; s=arc-20160816; b=A9Q1ymiZ/5j3q01jjo9PD+1+lgg/QouRj9gSQmRKDNV0MfgxkvHKfZjvNPkHbOacpL TA4bZ8gIjdhshN4o3vduRZeRhyzAK8XOfyUAb2Kzh8rKOVfckhU+Va7wNIB3hLg+uaQ9 LDlgkeNCawiUYx1dMN0SZn+7PmMex37ZXJEVH3GkTa5v6V6TB8Y9OGqIGYiiFa5dENuu DG3cDWLvY7BVslEdiqTz1BvbW/8qLR9/LEDYf+v6c9ezPQLe7K5d8a78gPc+rmYpZd81 vWyp8oLkfVqIiolLeQMWSmj6LE9x09ZTNUPmi+4J/LSDP3O2QFw0ZPBLb6+l5He7CZ7i BbAA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:delivered-to:sender:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature; bh=kzl6SNETF3Qh1JBD1PuyoFZrUYlOeeyPWGtIq3KUh38=; b=Ceav80z6ML/pBqgIGU2yhO8IDhN4MzWsihdaxKErdQcmLwYOaYaT80/ffVE2JDRm3r RvcN5exn1JJvgtSe72zUiJQLLU9uKDeUWW0L5Mz5IGF0F2Xk0dJQWoa4XhA7ioFU+Y2s RgRZZ2yPvUrPWGerekjTogeFm9puMIOmW+SOn2tuwKND1pb02WnLL1B179jOTx0YE5cQ SJbmSBQG3YEf4yk4K7vJLJH8qcFUeFFZZABUFxaIRyG/se+ILaIadnqoc+0WNqvHYkk3 kwnzvd/pWrqREr1xCDE4Q9jtG9n2rTXAxelvESS53b050JF68O7Grcu2T8bAp+GP634n h49A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=btRRdmDd; spf=pass (google.com: domain of gcc-patches-return-511318-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom="gcc-patches-return-511318-patch=linaro.org@gcc.gnu.org" Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id b8si4840390edc.231.2019.10.18.12.56.33 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 18 Oct 2019 12:56:33 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-return-511318-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=btRRdmDd; spf=pass (google.com: domain of gcc-patches-return-511318-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom="gcc-patches-return-511318-patch=linaro.org@gcc.gnu.org" DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type; q=dns; s=default; b=LA5X2/G1eJD7qEDb +t4d+ioO7ivMTKDAhLxmfMWqhiphDorA5bEyIs0QF25x+zst/cIT+9pIgefl4vE4 6cZK7qaY8b1PRAXoJT1/dPr5Kg7Jf/Kmt8YcbNNAApIQJBAtiSJsgRp3PNzAMn/k hqS7NG9d+AQMZCLjnMbmaNBPXOE= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type; s=default; bh=Gczxutf7Ke88xfCC+GJ1Mz elo8w=; b=btRRdmDdWud7mFFgx+008zM9GI31zPg4I5Jhj+ytvFlZHypPtvABpc PqH1XGaSn63SDaXoiBDiOKrnv+qrT37Ao/9+RnKJWleqihCljYGegHHtVmi2r4v8 dQ4keZIG1EYlHtf7nrSD6QWt1zlnQdNqYQ4H6UosyMElvLZreWJq8= Received: (qmail 112567 invoked by alias); 18 Oct 2019 19:55:40 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 110353 invoked by uid 89); 18 Oct 2019 19:55:31 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-18.6 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, SPF_PASS autolearn=ham version=3.3.1 spammy=if_then_else X-HELO: foss.arm.com Received: from Unknown (HELO foss.arm.com) (217.140.110.172) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 18 Oct 2019 19:55:30 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AA30F169C; Fri, 18 Oct 2019 12:49:20 -0700 (PDT) Received: from eagle.buzzard.freeserve.co.uk (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 378DA3F6C4; Fri, 18 Oct 2019 12:49:20 -0700 (PDT) From: Richard Earnshaw To: gcc-patches@gcc.gnu.org Cc: Richard Earnshaw Subject: [PATCH 12/29] [arm] Implement negscc using SBC when appropriate. Date: Fri, 18 Oct 2019 20:48:43 +0100 Message-Id: <20191018194900.34795-13-Richard.Earnshaw@arm.com> In-Reply-To: <20191018194900.34795-1-Richard.Earnshaw@arm.com> References: <20191018194900.34795-1-Richard.Earnshaw@arm.com> MIME-Version: 1.0 When the carry flag is appropriately set by a comprison, negscc patterns can expand into a simple SBC of a register with itself. This means we can convert two conditional instructions into a single non-conditional instruction. Furthermore, in Thumb2 we can avoid the need for an IT instruction as well. This patch also fixes the remaining testcase that we initially XFAILed in the first patch of this series. gcc: * config/arm/arm.md (negscc_borrow): New pattern. (mov_negscc): Don't split if the insn would match negscc_borrow. * config/arm/thumb2.md (thumb2_mov_negscc): Likewise. (thumb2_mov_negscc_strict_it): Likewise. testsuite: * gcc.target/arm/negdi-3.c: Remove XFAIL markers. --- gcc/config/arm/arm.md | 14 ++++++++++++-- gcc/config/arm/thumb2.md | 8 ++++++-- gcc/testsuite/gcc.target/arm/negdi-3.c | 8 ++++---- 3 files changed, 22 insertions(+), 8 deletions(-) diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index f53dbc27207..74f417fbe4b 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -6612,13 +6612,23 @@ (define_insn_and_split "*mov_scc" (set_attr "type" "multiple")] ) +(define_insn "*negscc_borrow" + [(set (match_operand:SI 0 "s_register_operand" "=r") + (neg:SI (match_operand:SI 1 "arm_borrow_operation" "")))] + "TARGET_32BIT" + "sbc\\t%0, %0, %0" + [(set_attr "conds" "use") + (set_attr "length" "4") + (set_attr "type" "adc_reg")] +) + (define_insn_and_split "*mov_negscc" [(set (match_operand:SI 0 "s_register_operand" "=r") (neg:SI (match_operator:SI 1 "arm_comparison_operator_mode" [(match_operand 2 "cc_register" "") (const_int 0)])))] - "TARGET_ARM" + "TARGET_ARM && !arm_borrow_operation (operands[1], SImode)" "#" ; "mov%D1\\t%0, #0\;mvn%d1\\t%0, #0" - "TARGET_ARM" + "&& true" [(set (match_dup 0) (if_then_else:SI (match_dup 1) (match_dup 3) diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md index 6ccc875e2b4..8d0b6be9205 100644 --- a/gcc/config/arm/thumb2.md +++ b/gcc/config/arm/thumb2.md @@ -368,7 +368,9 @@ (define_insn_and_split "*thumb2_mov_negscc" [(set (match_operand:SI 0 "s_register_operand" "=r") (neg:SI (match_operator:SI 1 "arm_comparison_operator_mode" [(match_operand 2 "cc_register" "") (const_int 0)])))] - "TARGET_THUMB2 && !arm_restrict_it" + "TARGET_THUMB2 + && !arm_restrict_it + && !arm_borrow_operation (operands[1], SImode)" "#" ; "ite\\t%D1\;mov%D1\\t%0, #0\;mvn%d1\\t%0, #0" "&& true" [(set (match_dup 0) @@ -387,7 +389,9 @@ (define_insn_and_split "*thumb2_mov_negscc_strict_it" [(set (match_operand:SI 0 "low_register_operand" "=l") (neg:SI (match_operator:SI 1 "arm_comparison_operator_mode" [(match_operand 2 "cc_register" "") (const_int 0)])))] - "TARGET_THUMB2 && arm_restrict_it" + "TARGET_THUMB2 + && arm_restrict_it + && !arm_borrow_operation (operands[1], SImode)" "#" ; ";mvn\\t%0, #0 ;it\\t%D1\;mov%D1\\t%0, #0\" "&& reload_completed" [(set (match_dup 0) diff --git a/gcc/testsuite/gcc.target/arm/negdi-3.c b/gcc/testsuite/gcc.target/arm/negdi-3.c index 3f6f2d1c2bb..76ddf49fc0d 100644 --- a/gcc/testsuite/gcc.target/arm/negdi-3.c +++ b/gcc/testsuite/gcc.target/arm/negdi-3.c @@ -11,7 +11,7 @@ Expected output: rsbs r0, r0, #0 sbc r1, r1, r1 */ -/* { dg-final { scan-assembler-times "rsb" 1 { xfail *-*-* } } } */ -/* { dg-final { scan-assembler-times "sbc" 1 { xfail *-*-* } } } */ -/* { dg-final { scan-assembler-times "mov" 0 { xfail *-*-* } } } */ -/* { dg-final { scan-assembler-times "rsc" 0 { xfail *-*-* } } } */ +/* { dg-final { scan-assembler-times "rsb" 1 } } */ +/* { dg-final { scan-assembler-times "sbc" 1 } } */ +/* { dg-final { scan-assembler-times "mov" 0 } } */ +/* { dg-final { scan-assembler-times "rsc" 0 } } */