From patchwork Fri Oct 18 19:48:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Richard Earnshaw \(lists\)" X-Patchwork-Id: 176947 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp1288075ocf; Fri, 18 Oct 2019 12:50:48 -0700 (PDT) X-Google-Smtp-Source: APXvYqwwXYCQoZQKFRF3I5B1blg/2w2FMvjFIV73PIoeVeKQ6sbD0hgVsiBJHq6DG5KpyoiT1SpU X-Received: by 2002:aa7:d389:: with SMTP id x9mr11705252edq.33.1571428248697; Fri, 18 Oct 2019 12:50:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571428248; cv=none; d=google.com; s=arc-20160816; b=YSCU6yljbnCpZQjbCR+zUPh05aSZbgMkfcmMpsakGf6E202Ojnkjo3fznd32tDpwJo Dcd31mgZhRgdNVbYn+o7wE9JuIlNb/LuZGBTAH2vkArohfkRTAvxuzJ0/PQevCwAqNul /lmAgVBbTOWtTTfERn0lGmJDBzaSY7Lyu2vQgXSwv12jtQ7IPMZ2LtqKW8999PCgWx+B dCwlx3WNR52w+4lIITGQqUTPj09F1yKMNVKtw/SnCmjCZD7jhJD76iAQZ24HkGGyop9J tXVizztTUR+X8Yl9yC/fJxOf+Grcy9rbPee/QsrwjOhbXO5MYBPmuIpVXcshkpJXNwoh aXoQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:delivered-to:sender:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature; bh=KNfzEr2UiZMOvXIwqPj2CXQ0urg6NDFCRADMQwMThkQ=; b=i/qfOqM3og77xVYvg5c0bmQA6XzNkhP6EoBsmcdCynAJiT6ReEL/OhAX6IPk1T5KUf rLCVo8ohlqqIR5QIK7ob+/twJEilf4g2TQFtnY9aBIHJxtiXJMwxhuTGSwnT3M12Uz7f CM+IK2GpZ+o5rv4T1/LrNgPogiruZelStmG5nX7z1XSYXfWtuPV0mxG+N+hy7pGF3B7z SNhzdl32Zi74/t3ZxRCsKDsDBINkEIzaaV7wDsZU8T1TNR0fZfXFYGhHatQQXI0sKxqm 1G0H25p0TXec5EHX4z5hZGPq55Z1+56wFIsyF71tVVAg4Z4TKTtNhTcb/DPsF6GlZBFz v7ag== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=ZPOjCKFI; spf=pass (google.com: domain of gcc-patches-return-511313-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom="gcc-patches-return-511313-patch=linaro.org@gcc.gnu.org" Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id x9si3878511eju.147.2019.10.18.12.50.47 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 18 Oct 2019 12:50:48 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-return-511313-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=ZPOjCKFI; spf=pass (google.com: domain of gcc-patches-return-511313-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom="gcc-patches-return-511313-patch=linaro.org@gcc.gnu.org" DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type; q=dns; s=default; b=EnzVCzME71WnNW1P of8kRaZwNiMVBVCx0sSRdTnen0vtu7shPvBkfzOzNOMR2YKEAIB2f4vu4dGA/Ub4 mGuGjrH+B3/PeTJhpqlh7OFzf6lTrQo3r/7W24uQQZe8FzrVzuL8tuqw4LPzNJxd tvveFVdupU0FCpdb9bjkMELH3uw= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type; s=default; bh=ZQx9gy5HflaFZA5qEsGZ7Y wlGsI=; b=ZPOjCKFI17kS9J2t+51EAgoIrlB4Lgc8PZNgtwX+FOWcY2SUaeh6Md STqidflMj0jyYTDLDdMlTFcnDhdKqOdkceUNw87CPcWLRuItyzyJusJvxfIhwvbp /jngME60dYMxBzexZPIHslG/jtHB8fGo+Eos2UcAkozEgDzROWlU4= Received: (qmail 78343 invoked by alias); 18 Oct 2019 19:49:39 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 78256 invoked by uid 89); 18 Oct 2019 19:49:39 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-18.4 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3 autolearn=ham version=3.3.1 spammy= X-HELO: foss.arm.com Received: from Unknown (HELO foss.arm.com) (217.140.110.172) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 18 Oct 2019 19:49:37 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id EA9951764; Fri, 18 Oct 2019 12:49:28 -0700 (PDT) Received: from eagle.buzzard.freeserve.co.uk (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 760BE3F6C4; Fri, 18 Oct 2019 12:49:28 -0700 (PDT) From: Richard Earnshaw To: gcc-patches@gcc.gnu.org Cc: Richard Earnshaw Subject: [PATCH 24/29] [arm] Improve constant handling for usubvsi4. Date: Fri, 18 Oct 2019 20:48:55 +0100 Message-Id: <20191018194900.34795-25-Richard.Earnshaw@arm.com> In-Reply-To: <20191018194900.34795-1-Richard.Earnshaw@arm.com> References: <20191018194900.34795-1-Richard.Earnshaw@arm.com> MIME-Version: 1.0 This patch improves the expansion of usubvsi4 by allowing suitable constants to be passed directly. Unlike normal subtraction, either operand may be a constant (and indeed I have seen cases where both can be with LTO enabled). One interesting testcase that improves as a result of this is: unsigned f6 (unsigned a) { unsigned x; return __builtin_sub_overflow (5U, a, &x) ? 0 : x; } Which previously compiled to: rsbs r3, r0, #5 cmp r0, #5 movls r0, r3 movhi r0, #0 but now generates the optimal sequence: rsbs r0, r0, #5 movcc r0, #0 * config/arm/arm.md (usubv4): Delete expansion. (usubvsi4): New pattern. Allow some immediate values for inputs. (usubvdi4): New pattern. --- gcc/config/arm/arm.md | 46 ++++++++++++++++++++++++++++++++++++++----- 1 file changed, 41 insertions(+), 5 deletions(-) diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index e9e0ca925d2..a465bf8e7a3 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -1352,14 +1352,50 @@ (define_expand "subv4" DONE; }) -(define_expand "usubv4" - [(match_operand:SIDI 0 "register_operand") - (match_operand:SIDI 1 "register_operand") - (match_operand:SIDI 2 "register_operand") +(define_expand "usubvsi4" + [(match_operand:SI 0 "s_register_operand") + (match_operand:SI 1 "arm_rhs_operand") + (match_operand:SI 2 "arm_add_operand") (match_operand 3 "")] "TARGET_32BIT" { - emit_insn (gen_sub3_compare1 (operands[0], operands[1], operands[2])); + machine_mode mode = CCmode; + if (CONST_INT_P (operands[1]) && CONST_INT_P (operands[2])) + { + /* If both operands are constants we can decide the result statically. */ + wi::overflow_type overflow; + wide_int val = wi::sub (rtx_mode_t (operands[1], SImode), + rtx_mode_t (operands[2], SImode), + UNSIGNED, &overflow); + emit_move_insn (operands[0], GEN_INT (val.to_shwi ())); + if (overflow != wi::OVF_NONE) + emit_jump_insn (gen_jump (operands[3])); + DONE; + } + else if (CONST_INT_P (operands[2])) + emit_insn (gen_cmpsi2_addneg (operands[0], operands[1], operands[2], + GEN_INT (-INTVAL (operands[2])))); + else if (CONST_INT_P (operands[1])) + { + mode = CC_RSBmode; + emit_insn (gen_rsb_imm_compare (operands[0], operands[1], operands[2], + GEN_INT (~UINTVAL (operands[1])))); + } + else + emit_insn (gen_subsi3_compare1 (operands[0], operands[1], operands[2])); + arm_gen_unlikely_cbranch (LTU, mode, operands[3]); + + DONE; +}) + +(define_expand "usubvdi4" + [(match_operand:DI 0 "s_register_operand") + (match_operand:DI 1 "s_register_operand") + (match_operand:DI 2 "s_register_operand") + (match_operand 3 "")] + "TARGET_32BIT" +{ + emit_insn (gen_subdi3_compare1 (operands[0], operands[1], operands[2])); arm_gen_unlikely_cbranch (LTU, CCmode, operands[3]); DONE;