diff --git a/gcc/config/arm/arm-fpus.def b/gcc/config/arm/arm-fpus.def
index 25e2ebd..1be718f 100644
--- a/gcc/config/arm/arm-fpus.def
+++ b/gcc/config/arm/arm-fpus.def
@@ -19,31 +19,31 @@
 
 /* Before using #include to read this file, define a macro:
 
-      ARM_FPU(NAME, FEATURES)
+      ARM_FPU(NAME, ISA, FEATURES)
 
    The arguments are the fields of struct arm_fpu_desc.
 
    genopt.sh assumes no whitespace up to the first "," in each entry.  */
 
-ARM_FPU("vfp",			FPU_VFPv2 | FPU_DBL)
-ARM_FPU("vfpv2",		FPU_VFPv2 | FPU_DBL)
-ARM_FPU("vfpv3",		FPU_VFPv3 | FPU_D32)
-ARM_FPU("vfpv3-fp16",		FPU_VFPv3 | FPU_D32 | FPU_FP16)
-ARM_FPU("vfpv3-d16",		FPU_VFPv3 | FPU_DBL)
-ARM_FPU("vfpv3-d16-fp16", 	FPU_VFPv3 | FPU_DBL | FPU_FP16)
-ARM_FPU("vfpv3xd",		FPU_VFPv3)
-ARM_FPU("vfpv3xd-fp16",		FPU_VFPv3 | FPU_FP16)
-ARM_FPU("neon",			FPU_VFPv3 | FPU_NEON)
-ARM_FPU("neon-vfpv3",		FPU_VFPv3 | FPU_NEON)
-ARM_FPU("neon-fp16",		FPU_VFPv3 | FPU_NEON | FPU_FP16)
-ARM_FPU("vfpv4",		FPU_VFPv4 | FPU_D32 | FPU_FP16)
-ARM_FPU("vfpv4-d16",		FPU_VFPv4 | FPU_DBL | FPU_FP16)
-ARM_FPU("fpv4-sp-d16",		FPU_VFPv4 | FPU_FP16)
-ARM_FPU("fpv5-sp-d16",		FPU_VFPv5 | FPU_FP16)
-ARM_FPU("fpv5-d16",		FPU_VFPv5 | FPU_DBL | FPU_FP16)
-ARM_FPU("neon-vfpv4",		FPU_VFPv4 | FPU_NEON | FPU_FP16)
-ARM_FPU("fp-armv8",		FPU_ARMv8 | FPU_D32 | FPU_FP16)
-ARM_FPU("neon-fp-armv8", 	FPU_ARMv8 | FPU_NEON | FPU_FP16)
-ARM_FPU("crypto-neon-fp-armv8", FPU_ARMv8 | FPU_CRYPTO | FPU_FP16)
+ARM_FPU("vfp",			ISA_FEAT(ISA_VFPv2) ISA_FEAT(ISA_FP_DBL),			     FPU_VFPv2 | FPU_DBL)
+ARM_FPU("vfpv2",		ISA_FEAT(ISA_VFPv2) ISA_FEAT(ISA_FP_DBL),			     FPU_VFPv2 | FPU_DBL)
+ARM_FPU("vfpv3",		ISA_FEAT(ISA_VFPv3) ISA_FEAT(ISA_FP_D32),			     FPU_VFPv3 | FPU_D32)
+ARM_FPU("vfpv3-fp16",		ISA_FEAT(ISA_VFPv3) ISA_FEAT(ISA_FP_D32) ISA_FEAT(isa_bit_fp16conv), FPU_VFPv3 | FPU_D32 | FPU_FP16)
+ARM_FPU("vfpv3-d16",		ISA_FEAT(ISA_VFPv3) ISA_FEAT(ISA_FP_DBL),			     FPU_VFPv3 | FPU_DBL)
+ARM_FPU("vfpv3-d16-fp16",	ISA_FEAT(ISA_VFPv3) ISA_FEAT(ISA_FP_DBL) ISA_FEAT(isa_bit_fp16conv), FPU_VFPv3 | FPU_DBL | FPU_FP16)
+ARM_FPU("vfpv3xd",		ISA_FEAT(ISA_VFPv3),						     FPU_VFPv3)
+ARM_FPU("vfpv3xd-fp16",		ISA_FEAT(ISA_VFPv3) ISA_FEAT(isa_bit_fp16conv),			     FPU_VFPv3 | FPU_FP16)
+ARM_FPU("neon",			ISA_FEAT(ISA_VFPv3) ISA_FEAT(ISA_NEON),				     FPU_VFPv3 | FPU_NEON)
+ARM_FPU("neon-vfpv3",		ISA_FEAT(ISA_VFPv3) ISA_FEAT(ISA_NEON),				     FPU_VFPv3 | FPU_NEON)
+ARM_FPU("neon-fp16",		ISA_FEAT(ISA_VFPv3) ISA_FEAT(ISA_NEON) ISA_FEAT(isa_bit_fp16conv),   FPU_VFPv3 | FPU_NEON | FPU_FP16)
+ARM_FPU("vfpv4",		ISA_FEAT(ISA_VFPv4) ISA_FEAT(ISA_FP_D32),			     FPU_VFPv4 | FPU_D32 | FPU_FP16)
+ARM_FPU("neon-vfpv4",		ISA_FEAT(ISA_VFPv4) ISA_FEAT(ISA_NEON),				     FPU_VFPv4 | FPU_NEON | FPU_FP16)
+ARM_FPU("vfpv4-d16",		ISA_FEAT(ISA_VFPv4) ISA_FEAT(ISA_FP_DBL),			     FPU_VFPv4 | FPU_DBL | FPU_FP16)
+ARM_FPU("fpv4-sp-d16",		ISA_FEAT(ISA_VFPv4),						     FPU_VFPv4 | FPU_FP16)
+ARM_FPU("fpv5-sp-d16",		ISA_FEAT(ISA_FPv5),						     FPU_VFPv5 | FPU_FP16)
+ARM_FPU("fpv5-d16",		ISA_FEAT(ISA_FPv5) ISA_FEAT(ISA_FP_DBL),			     FPU_VFPv5 | FPU_DBL | FPU_FP16)
+ARM_FPU("fp-armv8",		ISA_FEAT(ISA_FP_ARMv8) ISA_FEAT(ISA_FP_D32),			     FPU_ARMv8 | FPU_D32 | FPU_FP16)
+ARM_FPU("neon-fp-armv8",	ISA_FEAT(ISA_FP_ARMv8) ISA_FEAT(ISA_NEON),			     FPU_ARMv8 | FPU_NEON | FPU_FP16)
+ARM_FPU("crypto-neon-fp-armv8", ISA_FEAT(ISA_FP_ARMv8) ISA_FEAT(ISA_CRYPTO),			     FPU_ARMv8 | FPU_CRYPTO | FPU_FP16)
 /* Compatibility aliases.  */
-ARM_FPU("vfp3",			FPU_VFPv3 | FPU_D32)
+ARM_FPU("vfp3",			ISA_FEAT(ISA_VFPv3) ISA_FEAT(ISA_FP_D32),			     FPU_VFPv3 | FPU_D32)
diff --git a/gcc/config/arm/arm-isa.h b/gcc/config/arm/arm-isa.h
index 2d47c1b..25182e52 100644
--- a/gcc/config/arm/arm-isa.h
+++ b/gcc/config/arm/arm-isa.h
@@ -53,10 +53,18 @@ enum isa_feature
     isa_bit_ARMv8_2,	/* Architecutre rel 8.2.  */
     isa_bit_cmse,	/* M-Profile security extensions.  */
     /* Floating point and Neon extensions.  */
-    isa_bit_VFPv2,	/* Vector floating point v2 (our base level).  */
+    /* VFPv1 is not supported in GCC.  */
+    isa_bit_VFPv2,	/* Vector floating point v2.  */
     isa_bit_VFPv3,	/* Vector floating point v3.  */
+    isa_bit_VFPv4,	/* Vector floating point v4.  */
+    isa_bit_FPv5,	/* Floating point v5.  */
+    isa_bit_FP_ARMv8,	/* ARMv8 floating-point extension.  */
     isa_bit_neon,	/* Advanced SIMD instructions.  */
-    isa_bit_fp16,	/* FP16 extension (half-precision float).  */
+    isa_bit_fp16conv,	/* Conversions to/from fp16 (VFPv3 extension).  */
+    isa_bit_fp_dbl,	/* Double precision operations supported.  */
+    isa_bit_fp_d32,	/* 32 Double precision registers.  */
+    isa_bit_crypto,	/* Crypto extension to ARMv8.  */
+    isa_bit_fp16,	/* FP16 data processing (half-precision float).  */
 
     /* ISA Quirks (errata?).  Don't forget to add this to the list of
        all quirks below.  */
@@ -119,8 +127,22 @@ enum isa_feature
 #define ISA_ARMv8m_main ISA_ARMv7m, isa_bit_ARMv8, isa_bit_cmse
 
 /* List of all FPU bits to strip out if -mfpu is used to override the
-   default.  */
-#define ISA_ALL_FPU	isa_bit_VFPv2, isa_bit_VFPv3, isa_bit_neon
+   default.  isa_bit_fp16 is deliberately missing from this list.  */
+#define ISA_ALL_FPU	isa_bit_VFPv2, isa_bit_VFPv3, isa_bit_VFPv4, \
+    isa_bit_FPv5, isa_bit_FP_ARMv8, isa_bit_neon, isa_bit_fp16conv, \
+    isa_bit_fp_dbl, isa_bit_fp_d32, isa_bit_crypto
+
+/* Useful combinations.  */
+#define ISA_VFPv2	isa_bit_VFPv2
+#define ISA_VFPv3	ISA_VFPv2, isa_bit_VFPv3
+#define ISA_VFPv4	ISA_VFPv3, isa_bit_VFPv4, isa_bit_fp16conv
+#define ISA_FPv5	ISA_VFPv4, isa_bit_FPv5
+#define ISA_FP_ARMv8	ISA_FPv5, isa_bit_FP_ARMv8
+
+#define ISA_FP_DBL	isa_bit_fp_dbl
+#define ISA_FP_D32	ISA_FP_DBL, isa_bit_fp_d32
+#define ISA_NEON	ISA_FP_D32, isa_bit_neon
+#define ISA_CRYPTO	ISA_NEON, isa_bit_crypto
 
 /* List of all quirk bits to strip out when comparing CPU features with
    architectures.  */
diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt
index 9d83379..faa00aa 100644
--- a/gcc/config/arm/arm-tables.opt
+++ b/gcc/config/arm/arm-tables.opt
@@ -504,19 +504,19 @@ EnumValue
 Enum(arm_fpu) String(vfpv4) Value(11)
 
 EnumValue
-Enum(arm_fpu) String(vfpv4-d16) Value(12)
+Enum(arm_fpu) String(neon-vfpv4) Value(12)
 
 EnumValue
-Enum(arm_fpu) String(fpv4-sp-d16) Value(13)
+Enum(arm_fpu) String(vfpv4-d16) Value(13)
 
 EnumValue
-Enum(arm_fpu) String(fpv5-sp-d16) Value(14)
+Enum(arm_fpu) String(fpv4-sp-d16) Value(14)
 
 EnumValue
-Enum(arm_fpu) String(fpv5-d16) Value(15)
+Enum(arm_fpu) String(fpv5-sp-d16) Value(15)
 
 EnumValue
-Enum(arm_fpu) String(neon-vfpv4) Value(16)
+Enum(arm_fpu) String(fpv5-d16) Value(16)
 
 EnumValue
 Enum(arm_fpu) String(fp-armv8) Value(17)
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index e555cf6..bc246c9 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -2323,8 +2323,8 @@ char arm_arch_name[] = "__ARM_ARCH_PROFILE__";
 
 const struct arm_fpu_desc all_fpus[] =
 {
-#define ARM_FPU(NAME, FEATURES) \
-  { NAME, FEATURES },
+#define ARM_FPU(NAME, ISA, FEATURES)		\
+  { NAME, {ISA isa_nobit}, FEATURES },
 #include "arm-fpus.def"
 #undef ARM_FPU
 };
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 332f0fa..908e763 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -363,6 +363,7 @@ typedef unsigned long arm_fpu_feature_set;
 extern const struct arm_fpu_desc
 {
   const char *name;
+  enum isa_feature isa_bits[isa_num_bits];
   arm_fpu_feature_set features;
 } all_fpus[];
 

