diff --git a/gcc/config/arm/arm-cpu-cdata.h b/gcc/config/arm/arm-cpu-cdata.h
index eb13a5c..ddfb05c 100644
--- a/gcc/config/arm/arm-cpu-cdata.h
+++ b/gcc/config/arm/arm-cpu-cdata.h
@@ -22,394 +22,394 @@
 
 static const cpu_arch_extension cpu_opttab_arm9e[] = {
   {
-    "nofp", true,
+    "nofp", true, false,
     { ISA_ALL_FP, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_arm946es[] = {
   {
-    "nofp", true,
+    "nofp", true, false,
     { ISA_ALL_FP, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_arm966es[] = {
   {
-    "nofp", true,
+    "nofp", true, false,
     { ISA_ALL_FP, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_arm968es[] = {
   {
-    "nofp", true,
+    "nofp", true, false,
     { ISA_ALL_FP, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_arm10e[] = {
   {
-    "nofp", true,
+    "nofp", true, false,
     { ISA_ALL_FP, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_arm1020e[] = {
   {
-    "nofp", true,
+    "nofp", true, false,
     { ISA_ALL_FP, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_arm1022e[] = {
   {
-    "nofp", true,
+    "nofp", true, false,
     { ISA_ALL_FP, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_arm926ejs[] = {
   {
-    "nofp", true,
+    "nofp", true, false,
     { ISA_ALL_FP, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_arm1026ejs[] = {
   {
-    "nofp", true,
+    "nofp", true, false,
     { ISA_ALL_FP, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_genericv7a[] = {
   {
-    "simd", false,
-    { ISA_VFPv3,ISA_NEON, isa_nobit }
-  },
-  {
-    "vfpv3", false,
-    { ISA_VFPv3,ISA_FP_D32, isa_nobit }
-  },
-  {
-    "vfpv3-d16", false,
+    "vfpv3-d16", false, false,
     { ISA_VFPv3,ISA_FP_DBL, isa_nobit }
   },
   {
-    "vfpv3-fp16", false,
-    { ISA_VFPv3,ISA_FP_D32,isa_bit_fp16conv, isa_nobit }
+    "vfpv3", false, false,
+    { ISA_VFPv3,ISA_FP_D32, isa_nobit }
   },
   {
-    "vfpv3-d16-fp16", false,
+    "vfpv3-d16-fp16", false, false,
     { ISA_VFPv3,ISA_FP_DBL,isa_bit_fp16conv, isa_nobit }
   },
   {
-    "vfpv4", false,
-    { ISA_VFPv4,ISA_FP_D32, isa_nobit }
+    "vfpv3-fp16", false, false,
+    { ISA_VFPv3,ISA_FP_D32,isa_bit_fp16conv, isa_nobit }
   },
   {
-    "vfpv4-d16", false,
+    "vfpv4-d16", false, false,
     { ISA_VFPv4,ISA_FP_DBL, isa_nobit }
   },
   {
-    "neon", false,
-    { ISA_VFPv3,ISA_NEON, isa_nobit }
+    "vfpv4", false, false,
+    { ISA_VFPv4,ISA_FP_D32, isa_nobit }
   },
   {
-    "neon-vfpv3", false,
+    "simd", false, false,
     { ISA_VFPv3,ISA_NEON, isa_nobit }
   },
   {
-    "neon-fp16", false,
+    "neon-fp16", false, false,
     { ISA_VFPv3,ISA_NEON,isa_bit_fp16conv, isa_nobit }
   },
   {
-    "neon-vfpv4", false,
+    "neon-vfpv4", false, false,
     { ISA_VFPv4,ISA_NEON, isa_nobit }
   },
   {
-    "nofp", true,
+    "nosimd", true, false,
+    { ISA_ALL_SIMD, isa_nobit }
+  },
+  {
+    "nofp", true, false,
     { ISA_ALL_FP, isa_nobit }
   },
   {
-    "nosimd", true,
-    { ISA_ALL_SIMD, isa_nobit }
+    "neon", false, true, 
+    { ISA_VFPv3,ISA_NEON, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  {
+    "neon-vfpv3", false, true, 
+    { ISA_VFPv3,ISA_NEON, isa_nobit }
+  },
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_cortexa5[] = {
   {
-    "nosimd", true,
+    "nosimd", true, false,
     { ISA_ALL_SIMD, isa_nobit }
   },
   {
-    "nofp", true,
+    "nofp", true, false,
     { ISA_ALL_FP, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_cortexa7[] = {
   {
-    "nosimd", true,
+    "nosimd", true, false,
     { ISA_ALL_SIMD, isa_nobit }
   },
   {
-    "nofp", true,
+    "nofp", true, false,
     { ISA_ALL_FP, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_cortexa8[] = {
   {
-    "nofp", true,
+    "nofp", true, false,
     { ISA_ALL_FP, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_cortexa9[] = {
   {
-    "nofp", true,
-    { ISA_ALL_FP, isa_nobit }
+    "nosimd", true, false,
+    { ISA_ALL_SIMD, isa_nobit }
   },
   {
-    "nosimd", true,
-    { ISA_ALL_SIMD, isa_nobit }
+    "nofp", true, false,
+    { ISA_ALL_FP, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_cortexa12[] = {
   {
-    "nofp", true,
+    "nofp", true, false,
     { ISA_ALL_FP, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_cortexa15[] = {
   {
-    "nofp", true,
+    "nofp", true, false,
     { ISA_ALL_FP, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_cortexa17[] = {
   {
-    "nofp", true,
+    "nofp", true, false,
     { ISA_ALL_FP, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_cortexr5[] = {
   {
-    "nofp.dp", true,
+    "nofp.dp", true, false,
     { ISA_FP_DBL, isa_nobit }
   },
   {
-    "nofp", true,
+    "nofp", true, false,
     { ISA_ALL_FP, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_cortexr7[] = {
   {
-    "nofp", true,
+    "nofp", true, false,
     { ISA_ALL_FP, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_cortexr8[] = {
   {
-    "nofp", true,
+    "nofp", true, false,
     { ISA_ALL_FP, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_cortexm7[] = {
   {
-    "nofp.dp", true,
+    "nofp.dp", true, false,
     { ISA_FP_DBL, isa_nobit }
   },
   {
-    "nofp", true,
+    "nofp", true, false,
     { ISA_ALL_FP, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_cortexm4[] = {
   {
-    "nofp", true,
+    "nofp", true, false,
     { ISA_ALL_FP, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_cortexa15cortexa7[] = {
   {
-    "nofp", true,
+    "nofp", true, false,
     { ISA_ALL_FP, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_cortexa17cortexa7[] = {
   {
-    "nofp", true,
+    "nofp", true, false,
     { ISA_ALL_FP, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_cortexa32[] = {
   {
-    "crypto", false,
+    "crypto", false, false,
     { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit }
   },
   {
-    "nofp", true,
+    "nofp", true, false,
     { ISA_ALL_FP, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_cortexa35[] = {
   {
-    "crypto", false,
+    "crypto", false, false,
     { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit }
   },
   {
-    "nofp", true,
+    "nofp", true, false,
     { ISA_ALL_FP, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_cortexa53[] = {
   {
-    "crypto", false,
+    "crypto", false, false,
     { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit }
   },
   {
-    "nofp", true,
+    "nofp", true, false,
     { ISA_ALL_FP, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_cortexa57[] = {
   {
-    "crypto", false,
+    "crypto", false, false,
     { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_cortexa72[] = {
   {
-    "crypto", false,
+    "crypto", false, false,
     { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_cortexa73[] = {
   {
-    "crypto", false,
+    "crypto", false, false,
     { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_exynosm1[] = {
   {
-    "crypto", false,
+    "crypto", false, false,
     { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_falkor[] = {
   {
-    "crypto", false,
+    "crypto", false, false,
     { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_qdf24xx[] = {
   {
-    "crypto", false,
+    "crypto", false, false,
     { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_xgene1[] = {
   {
-    "crypto", false,
+    "crypto", false, false,
     { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_cortexa57cortexa53[] = {
   {
-    "crypto", false,
+    "crypto", false, false,
     { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_cortexa72cortexa53[] = {
   {
-    "crypto", false,
+    "crypto", false, false,
     { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_cortexa73cortexa35[] = {
   {
-    "crypto", false,
+    "crypto", false, false,
     { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_cortexa73cortexa53[] = {
   {
-    "crypto", false,
+    "crypto", false, false,
     { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const cpu_arch_extension cpu_opttab_cortexm33[] = {
   {
-    "nofp", true,
+    "nofp", true, false,
     { ISA_ALL_FP, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 const cpu_option all_cores[] =
@@ -1692,426 +1692,426 @@ const cpu_option all_cores[] =
 };
 static const struct cpu_arch_extension arch_opttab_armv5e[] = {
   {
-    "fp", false,
+    "fp", false, false,
     { ISA_VFPv2,ISA_FP_DBL, isa_nobit }
   },
   {
-    "vfpv2", false,
-    { ISA_VFPv2,ISA_FP_DBL, isa_nobit }
+    "nofp", true, false,
+    { ISA_ALL_FP, isa_nobit }
   },
   {
-    "nofp", true,
-    { ISA_ALL_FP, isa_nobit }
+    "vfpv2", false, true, 
+    { ISA_VFPv2,ISA_FP_DBL, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const struct cpu_arch_extension arch_opttab_armv5te[] = {
   {
-    "fp", false,
+    "fp", false, false,
     { ISA_VFPv2,ISA_FP_DBL, isa_nobit }
   },
   {
-    "vfpv2", false,
-    { ISA_VFPv2,ISA_FP_DBL, isa_nobit }
+    "nofp", true, false,
+    { ISA_ALL_FP, isa_nobit }
   },
   {
-    "nofp", true,
-    { ISA_ALL_FP, isa_nobit }
+    "vfpv2", false, true, 
+    { ISA_VFPv2,ISA_FP_DBL, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const struct cpu_arch_extension arch_opttab_armv5tej[] = {
   {
-    "fp", false,
+    "fp", false, false,
     { ISA_VFPv2,ISA_FP_DBL, isa_nobit }
   },
   {
-    "vfpv2", false,
-    { ISA_VFPv2,ISA_FP_DBL, isa_nobit }
+    "nofp", true, false,
+    { ISA_ALL_FP, isa_nobit }
   },
   {
-    "nofp", true,
-    { ISA_ALL_FP, isa_nobit }
+    "vfpv2", false, true, 
+    { ISA_VFPv2,ISA_FP_DBL, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const struct cpu_arch_extension arch_opttab_armv6[] = {
   {
-    "fp", false,
+    "fp", false, false,
     { ISA_VFPv2,ISA_FP_DBL, isa_nobit }
   },
   {
-    "vfpv2", false,
-    { ISA_VFPv2,ISA_FP_DBL, isa_nobit }
+    "nofp", true, false,
+    { ISA_ALL_FP, isa_nobit }
   },
   {
-    "nofp", true,
-    { ISA_ALL_FP, isa_nobit }
+    "vfpv2", false, true, 
+    { ISA_VFPv2,ISA_FP_DBL, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const struct cpu_arch_extension arch_opttab_armv6j[] = {
   {
-    "fp", false,
+    "fp", false, false,
     { ISA_VFPv2,ISA_FP_DBL, isa_nobit }
   },
   {
-    "vfpv2", false,
-    { ISA_VFPv2,ISA_FP_DBL, isa_nobit }
+    "nofp", true, false,
+    { ISA_ALL_FP, isa_nobit }
   },
   {
-    "nofp", true,
-    { ISA_ALL_FP, isa_nobit }
+    "vfpv2", false, true, 
+    { ISA_VFPv2,ISA_FP_DBL, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const struct cpu_arch_extension arch_opttab_armv6k[] = {
   {
-    "fp", false,
+    "fp", false, false,
     { ISA_VFPv2,ISA_FP_DBL, isa_nobit }
   },
   {
-    "vfpv2", false,
-    { ISA_VFPv2,ISA_FP_DBL, isa_nobit }
+    "nofp", true, false,
+    { ISA_ALL_FP, isa_nobit }
   },
   {
-    "nofp", true,
-    { ISA_ALL_FP, isa_nobit }
+    "vfpv2", false, true, 
+    { ISA_VFPv2,ISA_FP_DBL, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const struct cpu_arch_extension arch_opttab_armv6z[] = {
   {
-    "fp", false,
+    "fp", false, false,
     { ISA_VFPv2,ISA_FP_DBL, isa_nobit }
   },
   {
-    "vfpv2", false,
-    { ISA_VFPv2,ISA_FP_DBL, isa_nobit }
+    "nofp", true, false,
+    { ISA_ALL_FP, isa_nobit }
   },
   {
-    "nofp", true,
-    { ISA_ALL_FP, isa_nobit }
+    "vfpv2", false, true, 
+    { ISA_VFPv2,ISA_FP_DBL, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const struct cpu_arch_extension arch_opttab_armv6kz[] = {
   {
-    "fp", false,
+    "fp", false, false,
     { ISA_VFPv2,ISA_FP_DBL, isa_nobit }
   },
   {
-    "vfpv2", false,
-    { ISA_VFPv2,ISA_FP_DBL, isa_nobit }
+    "nofp", true, false,
+    { ISA_ALL_FP, isa_nobit }
   },
   {
-    "nofp", true,
-    { ISA_ALL_FP, isa_nobit }
+    "vfpv2", false, true, 
+    { ISA_VFPv2,ISA_FP_DBL, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const struct cpu_arch_extension arch_opttab_armv6zk[] = {
   {
-    "fp", false,
+    "fp", false, false,
     { ISA_VFPv2,ISA_FP_DBL, isa_nobit }
   },
   {
-    "vfpv2", false,
-    { ISA_VFPv2,ISA_FP_DBL, isa_nobit }
+    "nofp", true, false,
+    { ISA_ALL_FP, isa_nobit }
   },
   {
-    "nofp", true,
-    { ISA_ALL_FP, isa_nobit }
+    "vfpv2", false, true, 
+    { ISA_VFPv2,ISA_FP_DBL, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const struct cpu_arch_extension arch_opttab_armv6t2[] = {
   {
-    "fp", false,
+    "fp", false, false,
     { ISA_VFPv2,ISA_FP_DBL, isa_nobit }
   },
   {
-    "vfpv2", false,
-    { ISA_VFPv2,ISA_FP_DBL, isa_nobit }
+    "nofp", true, false,
+    { ISA_ALL_FP, isa_nobit }
   },
   {
-    "nofp", true,
-    { ISA_ALL_FP, isa_nobit }
+    "vfpv2", false, true, 
+    { ISA_VFPv2,ISA_FP_DBL, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const struct cpu_arch_extension arch_opttab_armv7[] = {
   {
-    "fp", false,
+    "fp", false, false,
     { ISA_VFPv3,ISA_FP_DBL, isa_nobit }
   },
   {
-    "vfpv3-d16", false,
+    "vfpv3-d16", false, true, 
     { ISA_VFPv3,ISA_FP_DBL, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const struct cpu_arch_extension arch_opttab_armv7_a[] = {
   {
-    "fp", false,
+    "fp", false, false,
     { ISA_VFPv3,ISA_FP_DBL, isa_nobit }
   },
   {
-    "vfpv3-d16", false,
-    { ISA_VFPv3,ISA_FP_DBL, isa_nobit }
-  },
-  {
-    "vfpv3", false,
+    "vfpv3", false, false,
     { ISA_VFPv3,ISA_FP_D32, isa_nobit }
   },
   {
-    "vfpv3-d16-fp16", false,
+    "vfpv3-d16-fp16", false, false,
     { ISA_VFPv3,ISA_FP_DBL,isa_bit_fp16conv, isa_nobit }
   },
   {
-    "vfpv3-fp16", false,
+    "vfpv3-fp16", false, false,
     { ISA_VFPv3,ISA_FP_DBL,ISA_FP_D32,isa_bit_fp16conv, isa_nobit }
   },
   {
-    "vfpv4-d16", false,
+    "vfpv4-d16", false, false,
     { ISA_VFPv4,ISA_FP_DBL, isa_nobit }
   },
   {
-    "vfpv4", false,
+    "vfpv4", false, false,
     { ISA_VFPv4,ISA_FP_D32, isa_nobit }
   },
   {
-    "simd", false,
+    "simd", false, false,
     { ISA_VFPv3,ISA_NEON, isa_nobit }
   },
   {
-    "neon", false,
-    { ISA_VFPv3,ISA_NEON, isa_nobit }
+    "neon-fp16", false, false,
+    { ISA_VFPv3,ISA_NEON,isa_bit_fp16conv, isa_nobit }
   },
   {
-    "neon-vfpv3", false,
-    { ISA_VFPv3,ISA_NEON, isa_nobit }
+    "neon-vfpv4", false, false,
+    { ISA_VFPv4,ISA_NEON, isa_nobit }
   },
   {
-    "neon-fp16", false,
-    { ISA_VFPv3,ISA_NEON,isa_bit_fp16conv, isa_nobit }
+    "nosimd", true, false,
+    { ISA_ALL_SIMD, isa_nobit }
   },
   {
-    "neon-vfpv4", false,
-    { ISA_VFPv4,ISA_NEON, isa_nobit }
+    "nofp", true, false,
+    { ISA_ALL_FP, isa_nobit }
   },
   {
-    "nofp", true,
-    { ISA_ALL_FP, isa_nobit }
+    "vfpv3-d16", false, true, 
+    { ISA_VFPv3,ISA_FP_DBL, isa_nobit }
   },
   {
-    "nosimd", true,
-    { ISA_ALL_SIMD, isa_nobit }
+    "neon", false, true, 
+    { ISA_VFPv3,ISA_NEON, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  {
+    "neon-vfpv3", false, true, 
+    { ISA_VFPv3,ISA_NEON, isa_nobit }
+  },
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const struct cpu_arch_extension arch_opttab_armv7ve[] = {
   {
-    "vfpv3-d16", false,
+    "vfpv3-d16", false, false,
     { ISA_VFPv3,ISA_FP_DBL, isa_nobit }
   },
   {
-    "vfpv3", false,
+    "vfpv3", false, false,
     { ISA_VFPv3,ISA_FP_D32, isa_nobit }
   },
   {
-    "vfpv3-d16-fp16", false,
+    "vfpv3-d16-fp16", false, false,
     { ISA_VFPv3,ISA_FP_DBL,isa_bit_fp16conv, isa_nobit }
   },
   {
-    "vfpv3-fp16", false,
+    "vfpv3-fp16", false, false,
     { ISA_VFPv3,ISA_FP_DBL,ISA_FP_D32,isa_bit_fp16conv, isa_nobit }
   },
   {
-    "vfpv4-d16", false,
+    "fp", false, false,
     { ISA_VFPv4,ISA_FP_DBL, isa_nobit }
   },
   {
-    "fp", false,
-    { ISA_VFPv4,ISA_FP_DBL, isa_nobit }
-  },
-  {
-    "vfpv4", false,
+    "vfpv4", false, false,
     { ISA_VFPv4,ISA_FP_D32, isa_nobit }
   },
   {
-    "neon", false,
+    "neon", false, false,
     { ISA_VFPv3,ISA_NEON, isa_nobit }
   },
   {
-    "neon-vfpv3", false,
-    { ISA_VFPv3,ISA_NEON, isa_nobit }
-  },
-  {
-    "neon-fp16", false,
+    "neon-fp16", false, false,
     { ISA_VFPv3,ISA_NEON,isa_bit_fp16conv, isa_nobit }
   },
   {
-    "simd", false,
+    "simd", false, false,
     { ISA_VFPv4,ISA_NEON, isa_nobit }
   },
   {
-    "neon-vfpv4", false,
-    { ISA_VFPv4,ISA_NEON, isa_nobit }
+    "nosimd", true, false,
+    { ISA_ALL_SIMD, isa_nobit }
   },
   {
-    "nofp", true,
+    "nofp", true, false,
     { ISA_ALL_FP, isa_nobit }
   },
   {
-    "nosimd", true,
-    { ISA_ALL_SIMD, isa_nobit }
+    "vfpv4-d16", false, true, 
+    { ISA_VFPv4,ISA_FP_DBL, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  {
+    "neon-vfpv3", false, true, 
+    { ISA_VFPv3,ISA_NEON, isa_nobit }
+  },
+  {
+    "neon-vfpv4", false, true, 
+    { ISA_VFPv4,ISA_NEON, isa_nobit }
+  },
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const struct cpu_arch_extension arch_opttab_armv7_r[] = {
   {
-    "fp.sp", false,
+    "fp.sp", false, false,
     { ISA_VFPv3, isa_nobit }
   },
   {
-    "fp", false,
+    "fp", false, false,
     { ISA_VFPv3,ISA_FP_DBL, isa_nobit }
   },
   {
-    "idiv", false,
+    "idiv", false, false,
     { isa_bit_adiv, isa_nobit }
   },
   {
-    "nofp", true,
+    "nofp", true, false,
     { ISA_ALL_FP, isa_nobit }
   },
   {
-    "noidiv", true,
+    "noidiv", true, false,
     { isa_bit_adiv, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const struct cpu_arch_extension arch_opttab_armv7e_m[] = {
   {
-    "fp", false,
+    "fp", false, false,
     { ISA_VFPv4, isa_nobit }
   },
   {
-    "fpv5", false,
+    "fpv5", false, false,
     { ISA_FPv5, isa_nobit }
   },
   {
-    "fp.dp", false,
+    "fp.dp", false, false,
     { ISA_FPv5,ISA_FP_DBL, isa_nobit }
   },
   {
-    "nofp", true,
+    "nofp", true, false,
     { ISA_ALL_FP, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const struct cpu_arch_extension arch_opttab_armv8_a[] = {
   {
-    "crc", false,
+    "crc", false, false,
     { isa_bit_crc32, isa_nobit }
   },
   {
-    "simd", false,
+    "simd", false, false,
     { ISA_FP_ARMv8,ISA_NEON, isa_nobit }
   },
   {
-    "crypto", false,
+    "crypto", false, false,
     { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit }
   },
   {
-    "nofp", true,
-    { ISA_ALL_FP, isa_nobit }
+    "nocrypto", true, false,
+    { ISA_ALL_CRYPTO, isa_nobit }
   },
   {
-    "nocrypto", true,
-    { ISA_ALL_CRYPTO, isa_nobit }
+    "nofp", true, false,
+    { ISA_ALL_FP, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const struct cpu_arch_extension arch_opttab_armv8_1_a[] = {
   {
-    "simd", false,
+    "simd", false, false,
     { ISA_FP_ARMv8,ISA_NEON, isa_nobit }
   },
   {
-    "crypto", false,
+    "crypto", false, false,
     { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit }
   },
   {
-    "nofp", true,
-    { ISA_ALL_FP, isa_nobit }
+    "nocrypto", true, false,
+    { ISA_ALL_CRYPTO, isa_nobit }
   },
   {
-    "nocrypto", true,
-    { ISA_ALL_CRYPTO, isa_nobit }
+    "nofp", true, false,
+    { ISA_ALL_FP, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const struct cpu_arch_extension arch_opttab_armv8_2_a[] = {
   {
-    "simd", false,
+    "simd", false, false,
     { ISA_FP_ARMv8,ISA_NEON, isa_nobit }
   },
   {
-    "fp16", false,
+    "fp16", false, false,
     { isa_bit_fp16,ISA_FP_ARMv8,ISA_NEON, isa_nobit }
   },
   {
-    "crypto", false,
+    "crypto", false, false,
     { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit }
   },
   {
-    "nofp", true,
-    { ISA_ALL_FP, isa_nobit }
+    "nocrypto", true, false,
+    { ISA_ALL_CRYPTO, isa_nobit }
   },
   {
-    "nocrypto", true,
-    { ISA_ALL_CRYPTO, isa_nobit }
+    "nofp", true, false,
+    { ISA_ALL_FP, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 static const struct cpu_arch_extension arch_opttab_armv8_m_main[] = {
   {
-    "dsp", false,
+    "dsp", false, false,
     { isa_bit_ARMv7em, isa_nobit }
   },
   {
-    "fp", false,
+    "fp", false, false,
     { ISA_FPv5, isa_nobit }
   },
   {
-    "fp.dp", false,
+    "fp.dp", false, false,
     { ISA_FPv5,ISA_FP_DBL, isa_nobit }
   },
   {
-    "nofp", true,
+    "nofp", true, false,
     { ISA_ALL_FP, isa_nobit }
   },
-  { NULL, false, {isa_nobit}}
+  { NULL, false, false, {isa_nobit}}
 };
 
 const arch_option all_architectures[] =
diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in
index 5a3a348..739de45 100644
--- a/gcc/config/arm/arm-cpus.in
+++ b/gcc/config/arm/arm-cpus.in
@@ -114,7 +114,7 @@ begin arch armv5e
  base 5E
  isa ARMv5e
  option fp add VFPv2 FP_DBL
- option vfpv2 add VFPv2 FP_DBL
+ optalias vfpv2 fp
  option nofp remove ALL_FP
 end arch armv5e
 
@@ -124,7 +124,7 @@ begin arch armv5te
  base 5TE
  isa ARMv5te
  option fp add VFPv2 FP_DBL
- option vfpv2 add VFPv2 FP_DBL
+ optalias vfpv2 fp
  option nofp remove ALL_FP
 end arch armv5te
 
@@ -134,7 +134,7 @@ begin arch armv5tej
  base 5TEJ
  isa ARMv5tej
  option fp add VFPv2 FP_DBL
- option vfpv2 add VFPv2 FP_DBL
+ optalias vfpv2 fp
  option nofp remove ALL_FP
 end arch armv5tej
 
@@ -144,7 +144,7 @@ begin arch armv6
  base 6
  isa ARMv6
  option fp add VFPv2 FP_DBL
- option vfpv2 add VFPv2 FP_DBL
+ optalias vfpv2 fp
  option nofp remove ALL_FP
 end arch armv6
 
@@ -154,7 +154,7 @@ begin arch armv6j
  base 6J
  isa ARMv6j
  option fp add VFPv2 FP_DBL
- option vfpv2 add VFPv2 FP_DBL
+ optalias vfpv2 fp
  option nofp remove ALL_FP
 end arch armv6j
 
@@ -164,7 +164,7 @@ begin arch armv6k
  base 6K
  isa ARMv6k
  option fp add VFPv2 FP_DBL
- option vfpv2 add VFPv2 FP_DBL
+ optalias vfpv2 fp
  option nofp remove ALL_FP
 end arch armv6k
 
@@ -174,7 +174,7 @@ begin arch armv6z
  base 6Z
  isa ARMv6z
  option fp add VFPv2 FP_DBL
- option vfpv2 add VFPv2 FP_DBL
+ optalias vfpv2 fp
  option nofp remove ALL_FP
 end arch armv6z
 
@@ -184,7 +184,7 @@ begin arch armv6kz
  base 6KZ
  isa ARMv6kz
  option fp add VFPv2 FP_DBL
- option vfpv2 add VFPv2 FP_DBL
+ optalias vfpv2 fp
  option nofp remove ALL_FP
 end arch armv6kz
 
@@ -194,7 +194,7 @@ begin arch armv6zk
  base 6KZ
  isa ARMv6kz
  option fp add VFPv2 FP_DBL
- option vfpv2 add VFPv2 FP_DBL
+ optalias vfpv2 fp
  option nofp remove ALL_FP
 end arch armv6zk
 
@@ -204,7 +204,7 @@ begin arch armv6t2
  base 6T2
  isa ARMv6t2
  option fp add VFPv2 FP_DBL
- option vfpv2 add VFPv2 FP_DBL
+ optalias vfpv2 fp
  option nofp remove ALL_FP
 end arch armv6t2
 
@@ -227,7 +227,7 @@ begin arch armv7
  isa ARMv7
 # fp => VFPv3-d16 (only useful for the A+R profile subset).
  option fp add VFPv3 FP_DBL
- option vfpv3-d16 add VFPv3 FP_DBL
+ optalias vfpv3-d16 fp
 end arch armv7
 
 begin arch armv7-a
@@ -236,20 +236,20 @@ begin arch armv7-a
  base 7A
  isa ARMv7a
 # fp => VFPv3-d16, simd => neon-vfpv3
- option fp             add VFPv3 FP_DBL
- option vfpv3-d16      add VFPv3 FP_DBL
- option vfpv3 	       add VFPv3 FP_D32
+ option fp	       add VFPv3 FP_DBL
+ optalias vfpv3-d16    fp
+ option vfpv3	       add VFPv3 FP_D32
  option vfpv3-d16-fp16 add VFPv3 FP_DBL bit_fp16conv
  option vfpv3-fp16     add VFPv3 FP_DBL FP_D32 bit_fp16conv
  option vfpv4-d16      add VFPv4 FP_DBL
- option vfpv4 	       add VFPv4 FP_D32
- option simd 	       add VFPv3 NEON
- option neon 	       add VFPv3 NEON
- option neon-vfpv3     add VFPv3 NEON
+ option vfpv4	       add VFPv4 FP_D32
+ option simd	       add VFPv3 NEON
+ optalias neon	       simd
+ optalias neon-vfpv3   simd
  option neon-fp16      add VFPv3 NEON bit_fp16conv
  option neon-vfpv4     add VFPv4 NEON
- option nofp 	    remove ALL_FP
- option nosimd 	    remove ALL_SIMD
+ option nosimd	    remove ALL_SIMD
+ option nofp	    remove ALL_FP
 end arch armv7-a
 
 begin arch armv7ve
@@ -262,16 +262,16 @@ begin arch armv7ve
  option vfpv3 	       add VFPv3 FP_D32
  option vfpv3-d16-fp16 add VFPv3 FP_DBL bit_fp16conv
  option vfpv3-fp16     add VFPv3 FP_DBL FP_D32 bit_fp16conv
- option vfpv4-d16      add VFPv4 FP_DBL
  option fp 	       add VFPv4 FP_DBL
+ optalias vfpv4-d16    fp
  option vfpv4 	       add VFPv4 FP_D32
  option neon 	       add VFPv3 NEON
- option neon-vfpv3     add VFPv3 NEON
+ optalias neon-vfpv3   neon
  option neon-fp16      add VFPv3 NEON bit_fp16conv
  option simd 	       add VFPv4 NEON
- option neon-vfpv4     add VFPv4 NEON
- option nofp 	    remove ALL_FP
- option nosimd 	    remove ALL_SIMD
+ optalias neon-vfpv4   simd
+ option nosimd	    remove ALL_SIMD
+ option nofp	    remove ALL_FP
 end arch armv7ve
 
 begin arch armv7-r
@@ -316,8 +316,8 @@ begin arch armv8-a
  option crc add bit_crc32
  option simd add FP_ARMv8 NEON
  option crypto add FP_ARMv8 CRYPTO
- option nofp remove ALL_FP
  option nocrypto remove ALL_CRYPTO
+ option nofp remove ALL_FP
 end arch armv8-a
 
 begin arch armv8.1-a
@@ -327,8 +327,8 @@ begin arch armv8.1-a
  isa ARMv8_1a
  option simd add FP_ARMv8 NEON
  option crypto add FP_ARMv8 CRYPTO
- option nofp remove ALL_FP
  option nocrypto remove ALL_CRYPTO
+ option nofp remove ALL_FP
 end arch armv8.1-a
 
 begin arch armv8.2-a
@@ -339,8 +339,8 @@ begin arch armv8.2-a
  option simd add FP_ARMv8 NEON
  option fp16 add bit_fp16 FP_ARMv8 NEON
  option crypto add FP_ARMv8 CRYPTO
- option nofp remove ALL_FP
  option nocrypto remove ALL_CRYPTO
+ option nofp remove ALL_FP
 end arch armv8.2-a
 
 begin arch armv8-m.base
@@ -385,6 +385,7 @@ end arch iwmmxt2
 #   [fpu <name>]
 #   [isa <additional-isa-flags-list>]
 #   [option <name> add|remove <isa-list>]*
+#   [optalias <name> <optname>]*
 #   [costs <name>]
 # end cpu <name>
 #
@@ -392,7 +393,9 @@ end arch iwmmxt2
 # non-valid punctuation characters to '_'.
 # If specified, tune for specifies a CPU target to use for tuning this core.
 # isa flags are appended to those defined by the architecture.
-
+# Each add option must have a distinct feature set and each remove
+# option must similarly have a distinct feature set.  Option aliases can be
+# added with the optalias statement
 
 # V2/V2A Architecture Processors
 begin cpu arm2
@@ -921,19 +924,19 @@ begin cpu generic-armv7-a
  tune flags LDSCHED
  architecture armv7-a
  fpu vfpv3-d16
- option simd add VFPv3 NEON
- option vfpv3 add VFPv3 FP_D32
  option vfpv3-d16 add VFPv3 FP_DBL
- option vfpv3-fp16 add VFPv3 FP_D32 bit_fp16conv
+ option vfpv3 add VFPv3 FP_D32
  option vfpv3-d16-fp16 add VFPv3 FP_DBL bit_fp16conv
- option vfpv4 add VFPv4 FP_D32
+ option vfpv3-fp16 add VFPv3 FP_D32 bit_fp16conv
  option vfpv4-d16 add VFPv4 FP_DBL
- option neon add VFPv3 NEON
- option neon-vfpv3 add VFPv3 NEON
+ option vfpv4 add VFPv4 FP_D32
+ option simd add VFPv3 NEON
+ optalias neon simd
+ optalias neon-vfpv3 simd
  option neon-fp16 add VFPv3 NEON bit_fp16conv
  option neon-vfpv4 add VFPv4 NEON
- option nofp remove ALL_FP
  option nosimd remove ALL_SIMD
+ option nofp remove ALL_FP
  costs cortex
 end cpu generic-armv7-a
 
@@ -971,8 +974,8 @@ begin cpu cortex-a9
  tune flags LDSCHED
  architecture armv7-a
  fpu neon-fp16
- option nofp remove ALL_FP
  option nosimd remove ALL_SIMD
+ option nofp remove ALL_FP
  costs cortex_a9
 end cpu cortex-a9
 
diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
index f30b81e..25210e2 100644
--- a/gcc/config/arm/arm-protos.h
+++ b/gcc/config/arm/arm-protos.h
@@ -478,8 +478,14 @@ extern struct arm_build_target arm_active_target;
 
 struct cpu_arch_extension
 {
+  /* Feature name.  */
   const char *const name;
+  /* True if the option is negative (removes extensions).  */
   bool remove;
+  /* True if the option is an alias for another option with identical effect;
+     the option will be ignored for canonicalization.  */
+  bool alias;
+  /* The modifier bits.  */
   const enum isa_feature isa_bits[isa_num_bits];
 };
 
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 1716b38..73b1369 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -65,6 +65,7 @@
 #include "optabs-libfuncs.h"
 #include "gimplify.h"
 #include "gimple.h"
+#include "selftest.h"
 
 /* This file should be included last.  */
 #include "target-def.h"
@@ -774,7 +775,6 @@ static const struct attribute_spec arm_attribute_table[] =
 #undef TARGET_CUSTOM_FUNCTION_DESCRIPTORS
 #define TARGET_CUSTOM_FUNCTION_DESCRIPTORS 2
 
-struct gcc_target targetm = TARGET_INITIALIZER;
 
 /* Obstack for minipool constant handling.  */
 static struct obstack minipool_obstack;
@@ -31220,4 +31220,84 @@ arm_coproc_ldc_stc_legitimate_address (rtx op)
     }
   return false;
 }
+
+#if CHECKING_P
+namespace selftest {
+
+/* Scan the static data tables generated by parsecpu.awk looking for
+   potential issues with the data.  We primarily check for
+   inconsistencies in the option extensions at present (extensions
+   that duplicate others but aren't marked as aliases).  Furthermore,
+   for correct canonicalization later options must never be a subset
+   of an earlier option.  */
+static void
+arm_test_cpu_arch_data (void)
+{
+  const arch_option *arch;
+  const cpu_option *cpu;
+  auto_sbitmap isa1 (isa_num_bits);
+  auto_sbitmap isa2 (isa_num_bits);
+
+  for (arch = all_architectures; arch->common.name != NULL; ++arch)
+    {
+      const cpu_arch_extension *ext1, *ext2;
+
+      if (arch->common.extensions == NULL)
+	continue;
+
+      for (ext1 = arch->common.extensions; ext1->name != NULL; ++ext1)
+	{
+	  if (ext1->alias)
+	    continue;
+
+	  arm_initialize_isa (isa1, ext1->isa_bits);
+	  for (ext2 = ext1 + 1; ext2->name != NULL; ++ext2)
+	    {
+	      if (ext2->alias || ext1->remove != ext2->remove)
+		continue;
+
+	      arm_initialize_isa (isa2, ext2->isa_bits);
+	      ASSERT_TRUE (!bitmap_subset_p (isa2, isa1));
+	    }
+	}
+    }
+
+  for (cpu = all_cores; cpu->common.name != NULL; ++cpu)
+    {
+      const cpu_arch_extension *ext1, *ext2;
+
+      if (cpu->common.extensions == NULL)
+	continue;
+
+      for (ext1 = cpu->common.extensions; ext1->name != NULL; ++ext1)
+	{
+	  if (ext1->alias)
+	    continue;
+
+	  arm_initialize_isa (isa1, ext1->isa_bits);
+	  for (ext2 = ext1 + 1; ext2->name != NULL; ++ext2)
+	    {
+	      if (ext2->alias || ext1->remove != ext2->remove)
+		continue;
+
+	      arm_initialize_isa (isa2, ext2->isa_bits);
+	      ASSERT_TRUE (!bitmap_subset_p (isa2, isa1));
+	    }
+	}
+    }
+}
+
+static void
+arm_run_selftests (void)
+{
+  arm_test_cpu_arch_data ();
+}
+} /* Namespace selftest.  */
+
+#undef TARGET_RUN_TARGET_SELFTESTS
+#define TARGET_RUN_TARGET_SELFTESTS selftest::arm_run_selftests
+#endif /* CHECKING_P */
+
+struct gcc_target targetm = TARGET_INITIALIZER;
+
 #include "gt-arm.h"
diff --git a/gcc/config/arm/parsecpu.awk b/gcc/config/arm/parsecpu.awk
index 3d6ca4d..61e8bc2 100644
--- a/gcc/config/arm/parsecpu.awk
+++ b/gcc/config/arm/parsecpu.awk
@@ -171,11 +171,28 @@ function gen_comm_data () {
 	    for (opt = 1; opt <= nopts; opt++) {
 		print "  {"
 		print "    \"" opts[opt] "\", " \
-		    cpu_opt_remove[cpus[n],opts[opt]] ","
+		    cpu_opt_remove[cpus[n],opts[opt]] ", false,"
 		print "    { " cpu_opt_isa[cpus[n],opts[opt]] ", isa_nobit }"
 		print "  },"
 	    }
-	    print "  { NULL, false, {isa_nobit}}"
+	    if (cpus[n] in cpu_optaliases) {
+		naliases = split (cpu_optaliases[cpus[n]], aliases)
+		for (alias = 1; alias <= naliases; alias++) {
+		    if (! ((cpus[n], \
+			    cpu_opt_alias[cpus[n],aliases[alias]]) in \
+			   cpu_opt_isa)) {
+			fatal("Alias " aliases[alias] " target not defined " \
+			      "for CPU " cpus[n])
+		    }
+		    equiv=cpu_opt_alias[cpus[n],aliases[alias]]
+		    print "  {"
+		    print "    \"" aliases[alias] "\", " \
+			cpu_opt_remove[cpus[n],equiv] ", true, "
+		    print "    { " cpu_opt_isa[cpus[n],equiv] ", isa_nobit }"
+		    print "  },"
+		}
+	    }
+	    print "  { NULL, false, false, {isa_nobit}}"
 	    print "};\n"
 	}
     }
@@ -231,12 +248,31 @@ function gen_comm_data () {
 	    for (opt = 1; opt <= nopts; opt++) {
 		print "  {"
 		print "    \"" opts[opt] "\", " \
-		    arch_opt_remove[archs[n],opts[opt]] ","
+		    arch_opt_remove[archs[n],opts[opt]] ", false,"
 		print "    { " arch_opt_isa[archs[n],opts[opt]] ", isa_nobit }"
 		print "  },"
 	    }
-	    print "  { NULL, false, {isa_nobit}}"
+	    if (archs[n] in arch_optaliases) {
+		naliases = split (arch_optaliases[archs[n]], aliases)
+		for (alias = 1; alias <= naliases; alias++) {
+		    if (! ((archs[n], \
+			    arch_opt_alias[archs[n],aliases[alias]]) in \
+			   arch_opt_isa)) {
+			fatal("Alias " aliases[alias] " target not defined " \
+			      "for architecture " archs[n])
+		    }
+		    equiv=arch_opt_alias[archs[n],aliases[alias]]
+		    print "  {"
+		    print "    \"" aliases[alias] "\", " \
+			arch_opt_remove[archs[n],equiv] ", true, "
+		    print "    { " arch_opt_isa[archs[n],equiv] ", isa_nobit }"
+		    print "  },"
+		}
+	    }
+	    print "  { NULL, false, false, {isa_nobit}}"
 	    print "};\n"
+	} else if (archs[n] in arch_optaliases) {
+	    fatal("Architecture " archs[n] " has option aliases but no options")
 	}
     }
 
@@ -529,6 +565,19 @@ BEGIN {
     parse_ok = 1
 }
 
+/^[ 	]*optalias / {
+    name=$2
+    alias=$3
+    if (cpu_name != "") {
+	cpu_optaliases[cpu_name] = cpu_optaliases[cpu_name] " " name
+	cpu_opt_alias[cpu_name,name] = alias
+    } else if (arch_name != "") {
+	arch_optaliases[arch_name] = arch_optaliases[arch_name] " " name
+	arch_opt_alias[arch_name,name] = alias
+    } else fatal("\"optalias\" outside of cpu or arch block")
+    parse_ok = 1
+}
+
 /^[ 	]*costs / {
     if (cpu_name == "") fatal("\"costs\" outside of cpu block")
     cpu_cost[cpu_name] = $2
