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[209.132.180.131]) by mx.google.com with ESMTPS id p187si14196178pfg.145.2016.10.24.01.07.43 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 24 Oct 2016 01:07:44 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-return-439350-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org; spf=pass (google.com: domain of gcc-patches-return-439350-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=gcc-patches-return-439350-patch=linaro.org@gcc.gnu.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :subject:to:references:cc:from:message-id:date:mime-version :in-reply-to:content-type; q=dns; s=default; b=unLYP6xHgy+3xIfWq EBaYGTwdmwOlbbnwY7i4Dz9TPf90VgtxARjLNfxMvh2OUOgMbyN1/ZH60KWXnsR9 JHODwshoc0ck0Fx5QEJgKG2HTZ4Pdhp8ZfBZI2z3m9lbMGVx4JP7PnRZjC5T2nc5 eUqM7idilVCECFKBJGiizKbqfM= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :subject:to:references:cc:from:message-id:date:mime-version :in-reply-to:content-type; s=default; bh=FQSceLZaMmRBZm2qTD2YWpZ le+8=; b=tv3ntjCsuSr3SpWPM8uU7IoIUBi2WLgKSvVVHLvwuUaj05oumhyV+rB I/SnOSfz3sLplmcxIC4gDU55Cl4DpZKRAFHtGoxNnl2eyFIAsv9jlUJaV+tI0Jxf IIeUgML3dhxr1NV5Xb2AIMMpc6S3bY81DUfpToLK77Nm5JitMNjE= Received: (qmail 120163 invoked by alias); 24 Oct 2016 08:07:28 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 120088 invoked by uid 89); 24 Oct 2016 08:07:28 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.0 required=5.0 tests=BAYES_00, KAM_LAZY_DOMAIN_SECURITY, KAM_LOTSOFHASH, RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=mapped, profiles, NEON, duplication X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 24 Oct 2016 08:07:17 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8EB622B; Mon, 24 Oct 2016 01:07:16 -0700 (PDT) Received: from [10.2.206.52] (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id ABA933F220; Mon, 24 Oct 2016 01:07:15 -0700 (PDT) Subject: Re: [PATCH, GCC/ARM 2/2, ping] Allow combination of aprofile and rmprofile multilibs To: Kyrill Tkachov , Ramana Radhakrishnan , Richard Earnshaw , "gcc-patches@gcc.gnu.org" References: Cc: "Jasmin J." From: Thomas Preudhomme Message-ID: <49f38170-be52-c9de-2d6f-f2f26e3362a7@foss.arm.com> Date: Mon, 24 Oct 2016 09:07:14 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.2.0 MIME-Version: 1.0 In-Reply-To: X-IsSubscribed: yes Ping? Best regards, Thomas On 13/10/16 16:35, Thomas Preudhomme wrote: > Hi ARM maintainers, > > This patchset aims at adding multilib support for R and M profile ARM > architectures and allowing it to be built alongside multilib for A profile ARM > architectures. This specific patch is concerned with the latter. The patch works > by moving the bits shared by both aprofile and rmprofile multilib build > (variable initilization as well as ISA and float ABI to build multilib for) to a > new t-multilib file. Then, based on which profile was requested in > --with-multilib-list option, that files includes t-aprofile and/or t-rmprofile > where the architecture and FPU to build the multilib for are specified. > > Unfortunately the duplication of CPU to A profile architectures could not be > avoided because substitution due to MULTILIB_MATCHES are not transitive. > Therefore, mapping armv7-a to armv7 for rmprofile multilib build does not have > the expected effect. Two patches were written to allow this using 2 different > approaches but I decided against it because this is not the right solution IMO. > See caveats below for what I believe is the correct approach. > > > *** combined build caveats *** > > As the documentation in this patch warns, there is a few caveats to using a > combined multilib build due to the way the multilib framework works. > > 1) For instance, when using only rmprofile the combination of options -mthumb > -march=armv7 -mfpu=neon the thumb/-march=armv7 multilib but in a combined > multilib build the default multilib would be used. This is because in the > rmprofile build -mfpu=neon is not specified in MULTILIB_OPTION and thus the > option is ignored when considering MULTILIB_REQUIRED entries. > > 2) Another issue is the fact that aprofile and rmprofile multilib build have > some conflicting requirements in terms of how to map options for which no > multilib is built to another option. (i) A first example of this is the > difference of CPU to architecture mapping mentionned above: rmprofile multilib > build needs A profile CPUs and architectures to be mapped down to ARMv7 so that > one of the v7-ar multilib gets chosen in such a case but aprofile needs A > profile architectures to stand on their own because multilibs are built for > several architectures. > > (ii) Another example of this is that in aprofile multilib build no multilib is > built with -mfpu=fpv5-d16 but some multilibs are built with -mfpu=fpv4-d16. > Therefore, aprofile defines a match rule to map fpv5-d16 onto fpv4-d16. However, > rmprofile multilib profile *does* build some multilibs with -mfpu=fpv5-d16. This > has the consequence that when building for -mthumb -march=armv7e-m > -mfpu=fpv5-d16 -mfloat-abi=hard the default multilib is chosen because this is > rewritten into -mthumb -march=armv7e-m -mfpu=fpv5-d16 -mfloat-abi=hard and there > is no multilib for that. > > Both of these issues could be handled by using MULTILIB_REUSE instead of > MULTILIB_MATCHES but this would require a large set of rules. I believe instead > the right approach is to create a new mechanism to inform GCC on how options can > be down mapped _when no multilib can be found_ which would require a smaller set > of rules and would make it explicit that the options are not equivalent. A patch > will be posted to this effect at a later time. > > ChangeLog entry is as follows: > > > *** gcc/ChangeLog *** > > 2016-10-03 Thomas Preud'homme > > * config.gcc: Allow combinations of aprofile and rmprofile values for > --with-multilib-list. > * config/arm/t-multilib: New file. > * config/arm/t-aprofile: Remove initialization of MULTILIB_* > variables. Remove setting of ISA and floating-point ABI in > MULTILIB_OPTIONS and MULTILIB_DIRNAMES. Set architecture and FPU in > MULTI_ARCH_OPTS_A and MULTI_ARCH_DIRS_A rather than MULTILIB_OPTIONS > and MULTILIB_DIRNAMES respectively. Add comment to introduce all > matches. Add architecture matches for marvel-pj4 and generic-armv7-a > CPU options. > * config/arm/t-rmprofile: Likewise except for the matches changes. > * doc/install.texi (--with-multilib-list): Document the combination of > aprofile and rmprofile values and warn about pitfalls in doing that. > > > Testing: > > * "tree install/lib/gcc/arm-none-eabi/7.0.0" is the same before and after the > patchset for both aprofile and rmprofile > * "tree install/lib/gcc/arm-none-eabi/7.0.0" is the same for aprofile,rmprofile > and rmprofile,aprofile > * default spec (gcc -dumpspecs) is the same for aprofile,rmprofile and > rmprofile,aprofile > > * Difference in --print-multi-directory between aprofile or rmprofile and > aprofile,rmprofile for all combination of ISA (ARM/Thumb), architecture, CPU, > FPU and float ABI is as expected (best multilib for the combination is chosen), > modulo the caveat mentionned above and the new marvel-pj4 and generic-armv7-a > CPU to architecture mapping. > > > Is this ok for master? > > Best regards, > > Thomas diff --git a/gcc/config.gcc b/gcc/config.gcc index bfd1127d6e8e647ca8c3a57dd2d58b586dffe4a5..d7508e89de0e1d7a3027da0b04e4fa36c1e95fd0 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -3710,34 +3710,18 @@ case "${target}" in # Add extra multilibs if test "x$with_multilib_list" != x; then arm_multilibs=`echo $with_multilib_list | sed -e 's/,/ /g'` - case ${arm_multilibs} in - aprofile) - # Note that arm/t-aprofile is a - # stand-alone make file fragment to be - # used only with itself. We do not - # specifically use the - # TM_MULTILIB_OPTION framework because - # this shorthand is more - # pragmatic. - tmake_profile_file="arm/t-aprofile" - ;; - rmprofile) - # Note that arm/t-rmprofile is a - # stand-alone make file fragment to be - # used only with itself. We do not - # specifically use the - # TM_MULTILIB_OPTION framework because - # this shorthand is more - # pragmatic. - tmake_profile_file="arm/t-rmprofile" - ;; - default) - ;; - *) - echo "Error: --with-multilib-list=${with_multilib_list} not supported." 1>&2 - exit 1 - ;; - esac + if test "x${arm_multilibs}" != xdefault ; then + for arm_multilib in ${arm_multilibs}; do + case ${arm_multilib} in + aprofile|rmprofile) + tmake_profile_file="arm/t-multilib" + ;; + *) + echo "Error: --with-multilib-list=${with_multilib_list} not supported." 1>&2 + exit 1 + ;; + esac + done if test "x${tmake_profile_file}" != x ; then # arm/t-aprofile and arm/t-rmprofile are only diff --git a/gcc/config/arm/t-aprofile b/gcc/config/arm/t-aprofile index 90305e1206e3964e08a673e385d3198747bdffa1..2cbd8e3c8e8bcd4bed6368bfea83ece953c8dbb4 100644 --- a/gcc/config/arm/t-aprofile +++ b/gcc/config/arm/t-aprofile @@ -24,30 +24,13 @@ # have their default values during the configure step. We enforce # this during the top-level configury. -MULTILIB_OPTIONS = -MULTILIB_DIRNAMES = -MULTILIB_EXCEPTIONS = -MULTILIB_MATCHES = -MULTILIB_REUSE = +# Arch and FPU variants to build libraries with -# We have the following hierachy: -# ISA: A32 (.) or T32 (thumb) -# Architecture: ARMv7-A (v7-a), ARMv7VE (v7ve), or ARMv8-A (v8-a). -# FPU: VFPv3-D16 (fpv3), NEONv1 (simdv1), VFPv4-D16 (fpv4), -# NEON-VFPV4 (simdvfpv4), NEON for ARMv8 (simdv8), or None (.). -# Float-abi: Soft (.), softfp (softfp), or hard (hardfp). +MULTI_ARCH_OPTS_A = march=armv7-a/march=armv7ve/march=armv8-a +MULTI_ARCH_DIRS_A = v7-a v7ve v8-a -MULTILIB_OPTIONS += mthumb -MULTILIB_DIRNAMES += thumb - -MULTILIB_OPTIONS += march=armv7-a/march=armv7ve/march=armv8-a -MULTILIB_DIRNAMES += v7-a v7ve v8-a - -MULTILIB_OPTIONS += mfpu=vfpv3-d16/mfpu=neon/mfpu=vfpv4-d16/mfpu=neon-vfpv4/mfpu=neon-fp-armv8 -MULTILIB_DIRNAMES += fpv3 simdv1 fpv4 simdvfpv4 simdv8 - -MULTILIB_OPTIONS += mfloat-abi=softfp/mfloat-abi=hard -MULTILIB_DIRNAMES += softfp hard +MULTI_FPU_OPTS_A = mfpu=vfpv3-d16/mfpu=neon/mfpu=vfpv4-d16/mfpu=neon-vfpv4/mfpu=neon-fp-armv8 +MULTI_FPU_DIRS_A = fpv3 simdv1 fpv4 simdvfpv4 simdv8 # Option combinations to build library with @@ -71,7 +54,11 @@ MULTILIB_REQUIRED += *march=armv8-a MULTILIB_REQUIRED += *march=armv8-a/mfpu=neon-fp-armv8/mfloat-abi=* +# Matches + # CPU Matches +MULTILIB_MATCHES += march?armv7-a=mcpu?marvell-pj4 +MULTILIB_MATCHES += march?armv7-a=mcpu?generic-armv7-a MULTILIB_MATCHES += march?armv7-a=mcpu?cortex-a8 MULTILIB_MATCHES += march?armv7-a=mcpu?cortex-a9 MULTILIB_MATCHES += march?armv7-a=mcpu?cortex-a5 diff --git a/gcc/config/arm/t-multilib b/gcc/config/arm/t-multilib new file mode 100644 index 0000000000000000000000000000000000000000..642e731765534904b752d7e15fb6b68a3db2708e --- /dev/null +++ b/gcc/config/arm/t-multilib @@ -0,0 +1,69 @@ +# Copyright (C) 2016 Free Software Foundation, Inc. +# +# This file is part of GCC. +# +# GCC is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3, or (at your option) +# any later version. +# +# GCC is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GCC; see the file COPYING3. If not see +# . + +# This is a target makefile fragment that attempts to get +# multilibs built for the range of CPU's, FPU's and ABI's that +# are relevant for the ARM architecture. It should not be used in +# conjunction with another make file fragment and assumes --with-arch, +# --with-cpu, --with-fpu, --with-float, --with-mode have their default +# values during the configure step. We enforce this during the +# top-level configury. + +MULTILIB_OPTIONS = +MULTILIB_DIRNAMES = +MULTILIB_EXCEPTIONS = +MULTILIB_MATCHES = +MULTILIB_REUSE = + +comma := , +tm_multilib_list := $(subst $(comma), ,$(TM_MULTILIB_CONFIG)) + +HAS_APROFILE := $(filter aprofile,$(tm_multilib_list)) +HAS_RMPROFILE := $(filter rmprofile,$(tm_multilib_list)) + +ifneq (,$(HAS_APROFILE)) +include $(srcdir)/config/arm/t-aprofile +endif +ifneq (,$(HAS_RMPROFILE)) +include $(srcdir)/config/arm/t-rmprofile +endif +SEP := $(and $(HAS_APROFILE),$(HAS_RMPROFILE),/) + + +# We have the following hierachy: +# ISA: A32 (.) or T16/T32 (thumb) +# Architecture: ARMv6-M (v6-m), ARMv7-M (v7-m), ARMv7E-M (v7e-m), +# ARMv7 (v7-ar), ARMv7-A (v7-a), ARMv7VE (v7ve), +# ARMv8-M Baseline (v8-m.base), ARMv8-M Mainline (v8-m.main) +# or ARMv8-A (v8-a). +# FPU: VFPv3-D16 (fpv3), NEONv1 (simdv1), FPV4-SP-D16 (fpv4-sp), +# VFPv4-D16 (fpv4), NEON-VFPV4 (simdvfpv4), FPV5-SP-D16 (fpv5-sp), +# VFPv5-D16 (fpv5), NEON for ARMv8 (simdv8), or None (.). +# Float-abi: Soft (.), softfp (softfp), or hard (hard). + +MULTILIB_OPTIONS += mthumb +MULTILIB_DIRNAMES += thumb + +MULTILIB_OPTIONS += $(MULTI_ARCH_OPTS_A)$(SEP)$(MULTI_ARCH_OPTS_RM) +MULTILIB_DIRNAMES += $(MULTI_ARCH_DIRS_A) $(MULTI_ARCH_DIRS_RM) + +MULTILIB_OPTIONS += $(MULTI_FPU_OPTS_A)$(SEP)$(MULTI_FPU_OPTS_RM) +MULTILIB_DIRNAMES += $(MULTI_FPU_DIRS_A) $(MULTI_FPU_DIRS_RM) + +MULTILIB_OPTIONS += mfloat-abi=softfp/mfloat-abi=hard +MULTILIB_DIRNAMES += softfp hard diff --git a/gcc/config/arm/t-rmprofile b/gcc/config/arm/t-rmprofile index c195a6590c2f8e1753a9f2498583f5be89df7d1e..ea6054dfd58be63426fc77e3a00a25fde96a8583 100644 --- a/gcc/config/arm/t-rmprofile +++ b/gcc/config/arm/t-rmprofile @@ -24,33 +24,14 @@ # values during the configure step. We enforce this during the # top-level configury. -MULTILIB_OPTIONS = -MULTILIB_DIRNAMES = -MULTILIB_EXCEPTIONS = -MULTILIB_MATCHES = -MULTILIB_REUSE = -# We have the following hierachy: -# ISA: A32 (.) or T16/T32 (thumb). -# Architecture: ARMv6S-M (v6-m), ARMv7-M (v7-m), ARMv7E-M (v7e-m), -# ARMv8-M Baseline (v8-m.base) or ARMv8-M Mainline (v8-m.main). -# FPU: VFPv3-D16 (fpv3), FPV4-SP-D16 (fpv4-sp), FPV5-SP-D16 (fpv5-sp), -# VFPv5-D16 (fpv5), or None (.). -# Float-abi: Soft (.), softfp (softfp), or hard (hardfp). +# Arch and FPU variants to build libraries with -# Options to build libraries with +MULTI_ARCH_OPTS_RM = march=armv6s-m/march=armv7-m/march=armv7e-m/march=armv7/march=armv8-m.base/march=armv8-m.main +MULTI_ARCH_DIRS_RM = v6-m v7-m v7e-m v7-ar v8-m.base v8-m.main -MULTILIB_OPTIONS += mthumb -MULTILIB_DIRNAMES += thumb - -MULTILIB_OPTIONS += march=armv6s-m/march=armv7-m/march=armv7e-m/march=armv7/march=armv8-m.base/march=armv8-m.main -MULTILIB_DIRNAMES += v6-m v7-m v7e-m v7-ar v8-m.base v8-m.main - -MULTILIB_OPTIONS += mfpu=vfpv3-d16/mfpu=fpv4-sp-d16/mfpu=fpv5-sp-d16/mfpu=fpv5-d16 -MULTILIB_DIRNAMES += fpv3 fpv4-sp fpv5-sp fpv5 - -MULTILIB_OPTIONS += mfloat-abi=softfp/mfloat-abi=hard -MULTILIB_DIRNAMES += softfp hard +MULTI_FPU_OPTS_RM = mfpu=vfpv3-d16/mfpu=fpv4-sp-d16/mfpu=fpv5-sp-d16/mfpu=fpv5-d16 +MULTI_FPU_DIRS_RM = fpv3 fpv4-sp fpv5-sp fpv5 # Option combinations to build library with diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi index 0b94bc1931a226e58d06a7ed5a726454142c006a..d91c82b569c017819cc2390085ed159e02929819 100644 --- a/gcc/doc/install.texi +++ b/gcc/doc/install.texi @@ -1114,14 +1114,18 @@ for each target is given below. @table @code @item arm*-*-* -@var{list} is one of@code{default}, @code{aprofile} or @code{rmprofile}. -Specifying @code{default} is equivalent to omitting this option, ie. only the -default runtime library will be enabled. Specifying @code{aprofile} or -@code{rmprofile} builds multilibs for a combination of ISA, architecture, -FPU available and floating-point ABI. +@var{list} is a comma separated list of @code{aprofile} and @code{rmprofile} +to build multilibs for A or R and M architecture profiles respectively. Note +that, due to some limitation of the current multilib framework, using the +combined @code{aprofile,rmprofile} multilibs selects in some cases a less +optimal multilib than when using the multilib profile for the architecture +targetted. The special value @code{default} is also accepted and is equivalent +to omitting the option, ie. only the default run-time library will be enabled. The table below gives the combination of ISAs, architectures, FPUs and floating-point ABIs for which multilibs are built for each accepted value. +The union of these options is considered when specifying both @code{aprofile} +and @code{rmprofile}. @multitable @columnfractions .15 .28 .30 @item Option @tab aprofile @tab rmprofile