From patchwork Wed May 25 14:47:17 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ramana Radhakrishnan X-Patchwork-Id: 1609 Return-Path: Delivered-To: unknown Received: from imap.gmail.com (74.125.159.109) by localhost6.localdomain6 with IMAP4-SSL; 08 Jun 2011 14:53:32 -0000 Delivered-To: patches@linaro.org Received: by 10.52.181.230 with SMTP id dz6cs231911vdc; Wed, 25 May 2011 07:47:20 -0700 (PDT) Received: by 10.227.32.129 with SMTP id c1mr566923wbd.32.1306334839695; Wed, 25 May 2011 07:47:19 -0700 (PDT) Received: from mail-wy0-f178.google.com (mail-wy0-f178.google.com [74.125.82.178]) by mx.google.com with ESMTPS id p18si1362071wbh.51.2011.05.25.07.47.19 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 25 May 2011 07:47:19 -0700 (PDT) Received-SPF: neutral (google.com: 74.125.82.178 is neither permitted nor denied by best guess record for domain of ramana.radhakrishnan@linaro.org) client-ip=74.125.82.178; Authentication-Results: mx.google.com; spf=neutral (google.com: 74.125.82.178 is neither permitted nor denied by best guess record for domain of ramana.radhakrishnan@linaro.org) smtp.mail=ramana.radhakrishnan@linaro.org Received: by wyb33 with SMTP id 33so7089805wyb.37 for ; Wed, 25 May 2011 07:47:19 -0700 (PDT) Received: by 10.227.208.77 with SMTP id gb13mr4704779wbb.43.1306334838951; Wed, 25 May 2011 07:47:18 -0700 (PDT) Received: from [192.168.32.37] (fw-lnat.cambridge.arm.com [217.140.96.63]) by mx.google.com with ESMTPS id p16sm418552wbh.36.2011.05.25.07.47.16 (version=SSLv3 cipher=OTHER); Wed, 25 May 2011 07:47:17 -0700 (PDT) Message-ID: <4DDD1675.8010008@linaro.org> Date: Wed, 25 May 2011 15:47:17 +0100 From: Ramana Radhakrishnan User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.2.17) Gecko/20110424 Lightning/1.0b2 Thunderbird/3.1.10 MIME-Version: 1.0 To: gcc-patches CC: Patch Tracking Subject: [Patch ARM] Actually generate vorn and vbic instructions. Hi, A co-worker pointed out that we weren't generating vorn and vbic instructions for Neon and I had a look. Tests are still running and will commit to trunk if there are no regressions. cheers Ramana 2011-05-25 Ramana Radhakrishnan * config/arm/neon.md ("orn3_neon"): Canonicalize not. ("orndi3_neon"): Likewise. ("bic3_neon"): Likewise. 2011-05-25 Ramana Radhakrishnan * gcc.target/arm/neon-vorn-vbic.c: New file. Index: gcc/config/arm/neon.md =================================================================== --- gcc/config/arm/neon.md (revision 174174) +++ gcc/config/arm/neon.md (working copy) @@ -794,8 +794,8 @@ (define_insn "orn3_neon" [(set (match_operand:VDQ 0 "s_register_operand" "=w") - (ior:VDQ (match_operand:VDQ 1 "s_register_operand" "w") - (not:VDQ (match_operand:VDQ 2 "s_register_operand" "w"))))] + (ior:VDQ (not:VDQ (match_operand:VDQ 2 "s_register_operand" "w")) + (match_operand:VDQ 1 "s_register_operand" "w")))] "TARGET_NEON" "vorn\t%0, %1, %2" [(set_attr "neon_type" "neon_int_1")] @@ -803,8 +803,8 @@ (define_insn "orndi3_neon" [(set (match_operand:DI 0 "s_register_operand" "=w,?=&r,?&r") - (ior:DI (match_operand:DI 1 "s_register_operand" "w,r,0") - (not:DI (match_operand:DI 2 "s_register_operand" "w,0,r"))))] + (ior:DI (not:DI (match_operand:DI 2 "s_register_operand" "w,0,r")) + (match_operand:DI 1 "s_register_operand" "w,r,0")))] "TARGET_NEON" "@ vorn\t%P0, %P1, %P2 @@ -816,8 +816,8 @@ (define_insn "bic3_neon" [(set (match_operand:VDQ 0 "s_register_operand" "=w") - (and:VDQ (match_operand:VDQ 1 "s_register_operand" "w") - (not:VDQ (match_operand:VDQ 2 "s_register_operand" "w"))))] + (and:VDQ (not:VDQ (match_operand:VDQ 2 "s_register_operand" "w")) + (match_operand:VDQ 1 "s_register_operand" "w")))] "TARGET_NEON" "vbic\t%0, %1, %2" [(set_attr "neon_type" "neon_int_1")] --- /dev/null 2011-05-18 14:49:12.916256701 +0100 +++ ./gcc/testsuite/gcc.target/arm/neon-vorn-vbic.c 2011-05-25 11:17:09.966726432 +0100 @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_neon_ok } */ +/* { dg-options "-O2 -ftree-vectorize" } */ +/* { dg-add-options arm_neon } */ + +void bor (int *__restrict__ c, int *__restrict__ a, int *__restrict__ b) +{ + int i; + for (i=0;i<9;i++) + c[i] = b[i] | (~a[i]); +} +void bic (int *__restrict__ c, int *__restrict__ a, int *__restrict__ b) +{ + int i; + for (i=0;i<9;i++) + c[i] = b[i] & (~a[i]); +} + +/* { dg-final { scan-assembler "vorn\\t" } } */ +/* { dg-final { scan-assembler "vbic\\t" } } */