From patchwork Fri Nov 18 10:27:10 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kyrill Tkachov X-Patchwork-Id: 82854 Delivered-To: patch@linaro.org Received: by 10.140.97.165 with SMTP id m34csp1264016qge; Fri, 18 Nov 2016 02:27:33 -0800 (PST) X-Received: by 10.37.19.3 with SMTP id 3mr3948576ybt.159.1479464853251; Fri, 18 Nov 2016 02:27:33 -0800 (PST) Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id t62si1525300ywd.361.2016.11.18.02.27.33 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 18 Nov 2016 02:27:33 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-return-441914-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org; spf=pass (google.com: domain of gcc-patches-return-441914-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=gcc-patches-return-441914-patch=linaro.org@gcc.gnu.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:subject:content-type; q= dns; s=default; b=Zt7MUq813OzvAVdRDz1rbXUhIqkk+JUM5IBIKvnLXkzSBq CCHZIHNsMOJg4dvTcF/kSpKak37je1cIvtTsnO9XNrD+zZwR5Ukz8Yb/xPTjaQcL 4E087zEVIlfnvbXpOd5MNTHaC/VHM36htdm5PEip/VzRa1vo5PQiu8oSI77nQ= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:subject:content-type; s= default; bh=aRuZFxtjTWRfJTgUxAGUtiqBP0w=; b=vhAN5ChRSmOEhyMa247L 8nVhMNtUdh68A6CtbgqFYnmD0VkFqVtk8hoB5HzUsZNi8bX0WfN6zdy2LFBG3SeL Fd1S3nDtYW0gAdBfU9CUA2ZNVOblHxARS3/k5bNjfbkjzwxqnjHiBkj5R5vWj9tL Bcbhx9r5X2kyv+jQJVjxcuk= Received: (qmail 65357 invoked by alias); 18 Nov 2016 10:27:16 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 65329 invoked by uid 89); 18 Nov 2016 10:27:15 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-3.8 required=5.0 tests=BAYES_00, KAM_LAZY_DOMAIN_SECURITY, RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=announcements, 31614, 316, 14 X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 18 Nov 2016 10:27:14 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8060B13D5; Fri, 18 Nov 2016 02:27:12 -0800 (PST) Received: from [10.2.207.77] (e100706-lin.cambridge.arm.com [10.2.207.77]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 320573F220 for ; Fri, 18 Nov 2016 02:27:12 -0800 (PST) Message-ID: <582ED77E.7030605@foss.arm.com> Date: Fri, 18 Nov 2016 10:27:10 +0000 From: Kyrill Tkachov User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: GCC Patches Subject: [PATCH][wwwdocs] Document new arm/aarch64 CPU support in a more compact way Hi all, This patch brings the new CPU support announcements in line with the format used in the GCC 6 notes. That is, rather than have a separate "The is now supported via the..." entry for each new core just list them and give a use example with the -mcpu,-mtune options. Ok to commit? Thanks, Kyrill Index: htdocs/gcc-7/changes.html =================================================================== RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-7/changes.html,v retrieving revision 1.24 diff -U 3 -r1.24 changes.html --- htdocs/gcc-7/changes.html 9 Nov 2016 14:28:59 -0000 1.24 +++ htdocs/gcc-7/changes.html 16 Nov 2016 10:23:04 -0000 @@ -287,14 +287,14 @@ processing floating-point instructions.
  • - The ARM Cortex-A73 processor is now supported via the - -mcpu=cortex-a73 and -mtune=cortex-a73 - options as well as the equivalent target attributes and pragmas. -
    • -
  • - The Broadcom Vulcan processor is now supported via the - -mcpu=vulcan and -mtune=vulcan options as - well as the equivalent target attributes and pragmas. + Support has been added for the following processors + (GCC identifiers in parentheses): ARM Cortex-A73 + (cortex-a73) and Broadcom Vulcan (vulcan). + The GCC identifiers can be used + as arguments to the -mcpu or -mtune options, + for example: -mcpu=cortex-a73 or + -mtune=vulcan or as arguments to the equivalent target + attributes and pragmas.
    • @@ -316,19 +316,14 @@ armv8-m.main+dsp options.
  • - The ARM Cortex-A73 processor is now supported via the - -mcpu=cortex-a73 and -mtune=cortex-a73 - options. -
    • -
  • - The ARM Cortex-M23 processor is now supported via the - -mcpu=cortex-m23 and -mtune=cortex-m23 - options. -
    • -
  • - The ARM Cortex-M33 processor is now supported via the - -mcpu=cortex-m33 and -mtune=cortex-m33 - options. + Support has been added for the following processors + (GCC identifiers in parentheses): ARM Cortex-A73 + (cortex-a73), ARM Cortex-M23 (cortex-m23) and + ARM Cortex-M33 (cortex-m33). + The GCC identifiers can be used + as arguments to the -mcpu or -mtune options, + for example: -mcpu=cortex-a73 or + -mtune=cortex-m33.