From patchwork Mon Jan 23 08:30:46 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ramana Radhakrishnan X-Patchwork-Id: 6341 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 9573F23E0C for ; Mon, 23 Jan 2012 08:30:51 +0000 (UTC) Received: from mail-bk0-f52.google.com (mail-bk0-f52.google.com [209.85.214.52]) by fiordland.canonical.com (Postfix) with ESMTP id 5CE31A18743 for ; Mon, 23 Jan 2012 08:30:51 +0000 (UTC) Received: by bkar19 with SMTP id r19so2466398bka.11 for ; Mon, 23 Jan 2012 00:30:51 -0800 (PST) Received: by 10.204.10.82 with SMTP id o18mr2810581bko.20.1327307451035; Mon, 23 Jan 2012 00:30:51 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.204.130.220 with SMTP id u28cs66178bks; Mon, 23 Jan 2012 00:30:49 -0800 (PST) Received: by 10.236.193.41 with SMTP id j29mr9361363yhn.12.1327307447882; Mon, 23 Jan 2012 00:30:47 -0800 (PST) Received: from mail-tul01m020-f178.google.com (mail-tul01m020-f178.google.com [209.85.214.178]) by mx.google.com with ESMTPS id y3si5374726anh.117.2012.01.23.00.30.46 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 23 Jan 2012 00:30:47 -0800 (PST) Received-SPF: neutral (google.com: 209.85.214.178 is neither permitted nor denied by best guess record for domain of ramana.radhakrishnan@linaro.org) client-ip=209.85.214.178; Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.214.178 is neither permitted nor denied by best guess record for domain of ramana.radhakrishnan@linaro.org) smtp.mail=ramana.radhakrishnan@linaro.org Received: by obbwc7 with SMTP id wc7so3774189obb.37 for ; Mon, 23 Jan 2012 00:30:46 -0800 (PST) MIME-Version: 1.0 Received: by 10.182.38.4 with SMTP id c4mr7112464obk.23.1327307446602; Mon, 23 Jan 2012 00:30:46 -0800 (PST) Received: by 10.182.88.7 with HTTP; Mon, 23 Jan 2012 00:30:46 -0800 (PST) Date: Mon, 23 Jan 2012 08:30:46 +0000 Message-ID: Subject: [Patch testsuite] Fix vec_interleave and vec_extract_even_odd to fall back to vec_perm From: Ramana Radhakrishnan To: gcc-patches Cc: Patch Tracking X-Gm-Message-State: ALoCoQkpl0fK5re3QxGku+fdayUu/5IaC5ySxdfBUd7uF/cRR3LUX0L0TEzj/6c5ZOHWQH8qzL+O Hi, Now that we have vec_perm support, vec_interleave and vec_extract_even_odd should fall out from that rather than having to handle an additional target in each of these. This fixes gcc.dg/vect/slp-11a.c for ARM Neon testing with no other regressions in gcc.dg/vect Ok ? cheers Ramana 2012-01-23 Ramana Radhakrishnan * lib/target-supports.exp (check_effective_target_vect_interleave): Use check_effective_target_vect_perm. (check_effective_target_vect_extract_even_odd): Likewise. - return $et_vect_interleave_saved + return [check_effective_target_vect_perm] } foreach N {2 3 4 8} { diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index be33407a..1a0e41f 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -3473,45 +3473,13 @@ proc check_effective_target_vect_int_mult { } { # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise. proc check_effective_target_vect_extract_even_odd { } { - global et_vect_extract_even_odd_saved - - if [info exists et_vect_extract_even_odd_saved] { - verbose "check_effective_target_vect_extract_even_odd: using cached result" 2 - } else { - set et_vect_extract_even_odd_saved 0 - if { [istarget powerpc*-*-*] - || [istarget i?86-*-*] - || [istarget x86_64-*-*] - || [istarget ia64-*-*] - || [istarget spu-*-*] } { - set et_vect_extract_even_odd_saved 1 - } - } - - verbose "check_effective_target_vect_extract_even_odd: returning $et_vect_extract_even_odd_saved" 2 - return $et_vect_extract_even_odd_saved + return [check_effective_target_vect_perm] } # Return 1 if the target supports vector interleaving, 0 otherwise. proc check_effective_target_vect_interleave { } { - global et_vect_interleave_saved - - if [info exists et_vect_interleave_saved] { - verbose "check_effective_target_vect_interleave: using cached result" 2 - } else { - set et_vect_interleave_saved 0 - if { [istarget powerpc*-*-*] - || [istarget i?86-*-*] - || [istarget x86_64-*-*] - || [istarget ia64-*-*] - || [istarget spu-*-*] } { - set et_vect_interleave_saved 1 - } - } - - verbose "check_effective_target_vect_interleave: returning $et_vect_interleave_saved" 2