From patchwork Fri Dec 8 11:20:29 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Richard Earnshaw \(lists\)" X-Patchwork-Id: 121148 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp527425qgn; Fri, 8 Dec 2017 03:20:45 -0800 (PST) X-Google-Smtp-Source: AGs4zMbQ+DYZzTIInoPtzhWALP5ib76p2BwRTcy11NTYgWx4cQxrTVxHj+brbNieYDvmDFLGxnZ9 X-Received: by 10.159.218.143 with SMTP id w15mr8531940plp.38.1512732045735; Fri, 08 Dec 2017 03:20:45 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1512732045; cv=none; d=google.com; s=arc-20160816; b=ByHwBa651+3gJHmsFg/WJT1Y7OMscQSMC6LDA6VyQVfGFzuWZdgWdPVTwLUXW67Qbd 9t7Y19VfD33z4M3RcFYrSUovgylTh6Xf1MzXF7peEuGGe65BFXnIVEE2l6LXJQA96LWg re3WY7bjqMUutwJuOwqgovrqQEjjBkFho4UmxuvIEDCqVOCizBVaxucyzl9rTO1CwQNT uvrhhclOMR9mNpI2XvIVmHXmbWulav4bSy02nl9eX4XbC3CCGVD2YxIr5ANCK1XS3uXF skdJwjrbIo+rS69JZ1Ah6PJOVouu9w9r0cQPW+bMDldqpUArTyk07RWPOi89/mD9QcM3 vxMQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:user-agent:date:message-id:subject:from:to :delivered-to:sender:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature:arc-authentication-results; bh=tFQz6VojqSo43BG224Uxd2ZL7ei3egFmvWo5deaxCAg=; b=DNPnpghw/5dGEQNStMlz1M2j4vl8JmOzLtU6lML7uwUwIklZ2Ad+7UyvlUiCnZ3kMY HxBlQgkpI+1q+t2iIfpTr6r3q4/K8NvS7N2ZiGQW0ftu1NXw3zCKicyOM7ifp8OkXd23 vAWzBU6End7g1Bvt6A0aWHuQ7n/C+1u0HAglQN4OR6YDl/U8fcEre9vI5CntXaZjpwFn EjfnclYd8jmdRfjf7bQAmV/JqqJHUb5aCUvtX9afSsE4bLjUegg+0Ui2E3fQFZ17Ax5m oajBwceDoyHmzywOHmCRSYtZfisGiNy+HcyBUQR7wlstZ2bnDsk9vfjt9vFv+5XdToT/ pIwA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=mAgrZH3J; spf=pass (google.com: domain of gcc-patches-return-468764-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=gcc-patches-return-468764-patch=linaro.org@gcc.gnu.org Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id 32si2834241plc.623.2017.12.08.03.20.45 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 08 Dec 2017 03:20:45 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-return-468764-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=mAgrZH3J; spf=pass (google.com: domain of gcc-patches-return-468764-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=gcc-patches-return-468764-patch=linaro.org@gcc.gnu.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to :from:subject:message-id:date:mime-version:content-type; q=dns; s=default; b=WYL76tlLmsbamgLBCRPmQH2HPZxORKo3Z+Jj/2G1025gDUQobq OqZWKuMDehtwx3048EsSNjSG1u4Ja8Uc1poNp3OC1FrWAFYoOzpFcw7o7meu3BMw l/fZfCaeOQ9qV+QIUN8h38ZW6g+aGSA4cgXv+EMau4osiXNNDLNnFQXw0= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to :from:subject:message-id:date:mime-version:content-type; s= default; bh=3Wigg/YHFOG7T8XtBfeqOptY5Uw=; b=mAgrZH3JF3G3ov0n9q2y OkKQsmDHoIPGcG/9uaCdKw2esId0LAsELOAeH9EkSEUaaG1SdfUIwBvahAwzxyzR rxMV/apULuWJSA7VTEmeimFFn+9UgcYFmMnKj2oN3iMFafo8aImnLGXuoq6jXua4 alEGG90IzZp/Tm2/3vk1sOw= Received: (qmail 59254 invoked by alias); 8 Dec 2017 11:20:35 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 59245 invoked by uid 89); 8 Dec 2017 11:20:35 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, SPF_PASS, T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=products X-HELO: foss.arm.com Received: from usa-sjc-mx-foss1.foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 08 Dec 2017 11:20:33 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 13D371529; Fri, 8 Dec 2017 03:20:32 -0800 (PST) Received: from e105689-lin.cambridge.arm.com (e105689-lin.cambridge.arm.com [10.2.207.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 920213F24A; Fri, 8 Dec 2017 03:20:31 -0800 (PST) To: gcc-patches From: "Richard Earnshaw (lists)" Subject: [arm] PR target/83206: Make native driver select fp-capable armv6 cores Message-ID: Date: Fri, 8 Dec 2017 11:20:29 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.0 MIME-Version: 1.0 A quirk in the historical naming of some ARMv6 products means that the main CPU name implies the presence or otherwise of the floating point unit. This causes problems when using -mfpu=auto with -mcpu=native: the driver is picking a CPU that does not support a floating-point unit, even though one may well exist. This patch addresses this by selecting the FP-capable names so that FP instructions will be generated if the other options suggest this is permitted. Note that a more complete fix is really needed here to look up the FP/simd capabilities and append the appropriate capability extensions. This will be the subject of some follow-up patches. * config/arm/driver-arm.c (arm_cpu_table): Use fp-capable product names for armv6 ARM CPU IDs. diff --git a/gcc/config/arm/driver-arm.c b/gcc/config/arm/driver-arm.c index 5c29b94caaba4ff6f89a191f1d8edcf10431c0b3..86212315f13e36e35d850cae624e17db464db8d9 100644 --- a/gcc/config/arm/driver-arm.c +++ b/gcc/config/arm/driver-arm.c @@ -33,12 +33,12 @@ static struct vendor_cpu arm_cpu_table[] = { {"0x926", "armv5te", "arm926ej-s"}, {"0xa26", "armv5te", "arm1026ej-s"}, {"0xb02", "armv6k", "mpcore"}, - {"0xb36", "armv6j", "arm1136j-s"}, - {"0xb56", "armv6t2", "arm1156t2-s"}, + {"0xb36", "armv6j", "arm1136jf-s"}, + {"0xb56", "armv6t2", "arm1156t2f-s"}, /* armv6kz is the correct spelling for ARMv6KZ but may not be supported in the version of binutils used. The incorrect spelling is supported in legacy and current binutils so that is used instead. */ - {"0xb76", "armv6zk", "arm1176jz-s"}, + {"0xb76", "armv6zk", "arm1176jzf-s"}, {"0xc05", "armv7-a", "cortex-a5"}, {"0xc07", "armv7ve", "cortex-a7"}, {"0xc08", "armv7-a", "cortex-a8"},