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[209.132.180.131]) by mx.google.com with ESMTPS id hk7si9945950pac.67.2014.10.27.01.03.57 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 27 Oct 2014 01:03:58 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-return-53816-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Received: (qmail 16513 invoked by alias); 27 Oct 2014 08:00:21 -0000 Mailing-List: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org Precedence: list List-Id: List-Unsubscribe: , List-Subscribe: List-Archive: List-Post: , List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 15565 invoked by uid 89); 27 Oct 2014 08:00:04 -0000 X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.5 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW autolearn=ham version=3.3.2 X-HELO: mail-ig0-f181.google.com X-Received: by 10.50.4.7 with SMTP id g7mr11160535igg.1.1414396800022; Mon, 27 Oct 2014 01:00:00 -0700 (PDT) From: Andrew Pinski To: libc-alpha@sourceware.org Cc: Andrew Pinski Subject: [PATCH 19/29] [AARCH64] Add ILP32 support to elf_machine_load_address. Date: Mon, 27 Oct 2014 00:59:43 -0700 Message-Id: <1414396793-9005-20-git-send-email-apinski@cavium.com> In-Reply-To: <1414396793-9005-1-git-send-email-apinski@cavium.com> References: <1414396793-9005-1-git-send-email-apinski@cavium.com> X-Original-Sender: apinski@cavium.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 2a00:1450:4010:c04::235 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org; dkim=pass header.i=@sourceware.org X-Google-Group-Id: 836684582541 This adds ILP32 support to elf_machine_load_address. Since elf_machine_load_address depends on the static address being found without relocations, we need to use 16bit relocation which gets resolved at link time for ILP32. This is just like how the 32bit relocation gets resolved at link time for LP64. * sysdeps/aarch64/dl-machine.h (elf_machine_load_address): Add support for ILP32. --- sysdeps/aarch64/dl-machine.h | 20 +++++++++++++++++--- 1 files changed, 17 insertions(+), 3 deletions(-) diff --git a/sysdeps/aarch64/dl-machine.h b/sysdeps/aarch64/dl-machine.h index 121b178..f3bcad1 100644 --- a/sysdeps/aarch64/dl-machine.h +++ b/sysdeps/aarch64/dl-machine.h @@ -54,19 +54,33 @@ elf_machine_load_address (void) by constructing a non GOT reference to the symbol, the dynamic address of the symbol we compute using adrp/add to compute the symbol's address relative to the PC. - This depends on 32bit relocations being resolved at link time - and that the static address fits in the 32bits. */ + This depends on 32/16bit relocations being resolved at link time + and that the static address fits in the 32/16 bits. */ ElfW(Addr) static_addr; ElfW(Addr) dynamic_addr; asm (" \n" " adrp %1, _dl_start; \n" +#ifdef __LP64__ " add %1, %1, #:lo12:_dl_start \n" -" ldr %w0, 1f \n" +#else +" add %w1, %w1, #:lo12:_dl_start \n" +#endif +" ldr %w0, 1f \n" " b 2f \n" "1: \n" +#ifdef __LP64__ " .word _dl_start \n" +#else +# ifdef __AARCH64EB__ +" .short 0 \n" +# endif +" .short _dl_start \n" +# ifndef __AARCH64EB__ +" .short 0 \n" +# endif +#endif "2: \n" : "=r" (static_addr), "=r" (dynamic_addr)); return dynamic_addr - static_addr;