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[209.132.180.131]) by mx.google.com with ESMTPS id y62-v6si138083pfd.254.2018.08.01.15.24.46 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 01 Aug 2018 15:24:46 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-return-94988-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=ERiXIqAw; spf=pass (google.com: domain of libc-alpha-return-94988-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom="libc-alpha-return-94988-patch=linaro.org@sourceware.org" Received: (qmail 25145 invoked by alias); 1 Aug 2018 22:24:05 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 24737 invoked by uid 89); 1 Aug 2018 22:24:02 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.6 required=5.0 tests=BAYES_00, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-ua0-f172.google.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=aL1gAGPGZHQcFp7XdCKPoN1KsedXCn7XSo0W7UBK6Qo=; b=ERiXIqAwOubPdMusvYtOQVq5B6WNF9QOYwFpU+CAfGCxFW7xaudiCmUjruXfuUm1kp T3SvwayXPH8Ku19vFy8NKmlDWDCfa5D4ON3yWsQ4hvq/OY4Ok/Bhcuuy6AMWePRZeFHD /F52Y0U1jZHRZ6pWaiYv0sI6CA9ME/5diutyTZh7L7n+JDUxK5CJktrfE7rVzgz76SaH WncUInI0DlI7Em/aOfTYm8xIeKWH7FTeQh4MUATuWMLvcZLCsA0AClv2MvguJlJdFzqv b3jTDUoGmtGlGmvMmGRDCr4PTvbu4UfZv1+eQOdMltJpf21hY5eJn9H9h96gyB9K9y1b 1jCQ== Return-Path: Sender: Richard Henderson From: rth@twiddle.net To: libc-alpha@sourceware.org Cc: marcus.shawcroft@linaro.org, szabolcs.nagy@arm.com, Richard Henderson Subject: [PATCH 2/3] aarch64: Clean up _dl_runtime_profile Date: Wed, 1 Aug 2018 18:23:46 -0400 Message-Id: <20180801222347.18903-3-rth@twiddle.net> In-Reply-To: <20180801222347.18903-1-rth@twiddle.net> References: <20180801222347.18903-1-rth@twiddle.net> From: Richard Henderson Not adjusting La_aarch64_regs or La_aarch64_retval for the new AdvSIMD vector ABI; that will require more thought and coordination. In the meantime, this will at least pass the proper values to each callee, even if the values are not visible to auditing. * sysdeps/aarch64/dl-trampoline.S (_dl_runtime_profile): Do not record unwind info for arguments -- this is unneeded; properly include the 16 bytes of PLT stack into the unwind; save and restore the structure return pointer, x8; save all of the AdvSIMD registers defined for the vector ABI. --- sysdeps/aarch64/dl-trampoline.S | 138 ++++++++++++++++---------------- 1 file changed, 71 insertions(+), 67 deletions(-) -- 2.17.1 Reviewed-By: Szabolcs Nagy diff --git a/sysdeps/aarch64/dl-trampoline.S b/sysdeps/aarch64/dl-trampoline.S index e8e2af485a..67a7c1b207 100644 --- a/sysdeps/aarch64/dl-trampoline.S +++ b/sysdeps/aarch64/dl-trampoline.S @@ -101,7 +101,6 @@ _dl_runtime_resolve: #ifndef PROF .globl _dl_runtime_profile .type _dl_runtime_profile, #function - cfi_startproc .align 2 _dl_runtime_profile: /* AArch64 we get called with: @@ -111,15 +110,16 @@ _dl_runtime_profile: [sp, #0] &PLTGOT[n] Stack frame layout: - [sp, #...] lr - [sp, #...] &PLTGOT[n] - [sp, #96] La_aarch64_regs - [sp, #48] La_aarch64_retval - [sp, #40] frame size return from pltenter - [sp, #32] dl_profile_call saved x1 - [sp, #24] dl_profile_call saved x0 - [sp, #16] t1 - [sp, #0] x29, lr <- x29 + [x29, #...] lr + [x29, #...] &PLTGOT[n] + [x29, #96] La_aarch64_regs + [x29, #48] La_aarch64_retval + [x29, #40] frame size return from pltenter + [x29, #32] dl_profile_call saved x1 + [x29, #24] dl_profile_call saved x0 + [x29, #16] t1 + [x29, #0] x29, x8 + [x29, #-128] full q[0-7] contents */ # define OFFSET_T1 16 @@ -127,46 +127,39 @@ _dl_runtime_profile: # define OFFSET_FS OFFSET_SAVED_CALL_X0 + 16 # define OFFSET_RV OFFSET_FS + 8 # define OFFSET_RG OFFSET_RV + DL_SIZEOF_RV +# define OFFSET_SAVED_VEC (-16 * 8) -# define SF_SIZE OFFSET_RG + DL_SIZEOF_RG +# define SF_SIZE (OFFSET_RG + DL_SIZEOF_RG) # define OFFSET_PLTGOTN SF_SIZE # define OFFSET_LR OFFSET_PLTGOTN + 8 - /* Save arguments. */ - sub sp, sp, #SF_SIZE - cfi_adjust_cfa_offset (SF_SIZE) - stp x29, x30, [SP, #0] - mov x29, sp - cfi_def_cfa_register (x29) - cfi_rel_offset (x29, 0) + cfi_startproc + cfi_adjust_cfa_offset(16) /* Incorporate PLT */ cfi_rel_offset (lr, 8) - stp x0, x1, [x29, #OFFSET_RG + DL_OFFSET_RG_X0 + 16*0] - cfi_rel_offset (x0, OFFSET_RG + DL_OFFSET_RG_X0 + 16*0 + 0) - cfi_rel_offset (x1, OFFSET_RG + DL_OFFSET_RG_X0 + 16*0 + 8) - stp x2, x3, [x29, #OFFSET_RG + DL_OFFSET_RG_X0 + 16*1] - cfi_rel_offset (x2, OFFSET_RG + DL_OFFSET_RG_X0 + 16*1 + 0) - cfi_rel_offset (x3, OFFSET_RG + DL_OFFSET_RG_X0 + 16*1 + 8) - stp x4, x5, [x29, #OFFSET_RG + DL_OFFSET_RG_X0 + 16*2] - cfi_rel_offset (x4, OFFSET_RG + DL_OFFSET_RG_X0 + 16*2 + 0) - cfi_rel_offset (x5, OFFSET_RG + DL_OFFSET_RG_X0 + 16*2 + 8) - stp x6, x7, [x29, #OFFSET_RG + DL_OFFSET_RG_X0 + 16*3] - cfi_rel_offset (x6, OFFSET_RG + DL_OFFSET_RG_X0 + 16*3 + 0) - cfi_rel_offset (x7, OFFSET_RG + DL_OFFSET_RG_X0 + 16*3 + 8) + stp x29, x8, [SP, #-SF_SIZE]! + cfi_adjust_cfa_offset (SF_SIZE) + cfi_rel_offset (x29, 0) + mov x29, sp + cfi_def_cfa_register (x29) + sub sp, sp, #-OFFSET_SAVED_VEC - stp d0, d1, [X29, #OFFSET_RG + DL_OFFSET_RG_D0 + 16*0] - cfi_rel_offset (d0, OFFSET_RG + DL_OFFSET_RG_D0 + 16*0) - cfi_rel_offset (d1, OFFSET_RG + DL_OFFSET_RG_D0 + 16*0 + 8) - stp d2, d3, [X29, #OFFSET_RG+ DL_OFFSET_RG_D0 + 16*1] - cfi_rel_offset (d2, OFFSET_RG + DL_OFFSET_RG_D0 + 16*1 + 0) - cfi_rel_offset (d3, OFFSET_RG + DL_OFFSET_RG_D0 + 16*1 + 8) - stp d4, d5, [X29, #OFFSET_RG + DL_OFFSET_RG_D0 + 16*2] - cfi_rel_offset (d4, OFFSET_RG + DL_OFFSET_RG_D0 + 16*2 + 0) - cfi_rel_offset (d5, OFFSET_RG + DL_OFFSET_RG_D0 + 16*2 + 8) - stp d6, d7, [X29, #OFFSET_RG + DL_OFFSET_RG_D0 + 16*3] - cfi_rel_offset (d6, OFFSET_RG + DL_OFFSET_RG_D0 + 16*3 + 0) - cfi_rel_offset (d7, OFFSET_RG + DL_OFFSET_RG_D0 + 16*3 + 8) + /* Save La_aarch64_regs. */ + stp x0, x1, [x29, #OFFSET_RG + DL_OFFSET_RG_X0 + 16*0] + stp x2, x3, [x29, #OFFSET_RG + DL_OFFSET_RG_X0 + 16*1] + stp x4, x5, [x29, #OFFSET_RG + DL_OFFSET_RG_X0 + 16*2] + stp x6, x7, [x29, #OFFSET_RG + DL_OFFSET_RG_X0 + 16*3] + stp d0, d1, [x29, #OFFSET_RG + DL_OFFSET_RG_D0 + 16*0] + stp d2, d3, [x29, #OFFSET_RG + DL_OFFSET_RG_D0 + 16*1] + stp d4, d5, [x29, #OFFSET_RG + DL_OFFSET_RG_D0 + 16*2] + stp d6, d7, [x29, #OFFSET_RG + DL_OFFSET_RG_D0 + 16*3] + + /* Re-save the full contents of the vector arguments. */ + stp q0, q1, [x29, #OFFSET_SAVED_VEC + 16*0] + stp q2, q3, [x29, #OFFSET_SAVED_VEC + 16*2] + stp q4, q5, [x29, #OFFSET_SAVED_VEC + 16*4] + stp q6, q7, [x29, #OFFSET_SAVED_VEC + 16*6] add x0, x29, #SF_SIZE + 16 ldr x1, [x29, #OFFSET_LR] @@ -201,31 +194,28 @@ _dl_runtime_profile: mov ip0, x0 /* Get arguments and return address back. */ + ldr lr, [x29, #OFFSET_LR] ldp x0, x1, [x29, #OFFSET_RG + DL_OFFSET_RG_X0 + 16*0] ldp x2, x3, [x29, #OFFSET_RG + DL_OFFSET_RG_X0 + 16*1] ldp x4, x5, [x29, #OFFSET_RG + DL_OFFSET_RG_X0 + 16*2] ldp x6, x7, [x29, #OFFSET_RG + DL_OFFSET_RG_X0 + 16*3] - ldp d0, d1, [x29, #OFFSET_RG + DL_OFFSET_RG_D0 + 16*0] - ldp d2, d3, [x29, #OFFSET_RG + DL_OFFSET_RG_D0 + 16*1] - ldp d4, d5, [x29, #OFFSET_RG + DL_OFFSET_RG_D0 + 16*2] - ldp d6, d7, [x29, #OFFSET_RG + DL_OFFSET_RG_D0 + 16*3] + ldp q0, q1, [x29, #OFFSET_SAVED_VEC + 16*0] + ldp q2, q3, [x29, #OFFSET_SAVED_VEC + 16*2] + ldp q4, q5, [x29, #OFFSET_SAVED_VEC + 16*4] + ldp q6, q7, [x29, #OFFSET_SAVED_VEC + 16*6] - cfi_def_cfa_register (sp) - ldp x29, x30, [x29, #0] - cfi_restore(x29) - cfi_restore(x30) - - add sp, sp, SF_SIZE + 16 - cfi_adjust_cfa_offset (- SF_SIZE - 16) + mov sp, x29 + ldp x29, x8, [sp], SF_SIZE + 16 + cfi_def_cfa (sp, 0) + cfi_restore (x29) + cfi_restore (lr) /* Jump to the newly found address. */ br ip0 cfi_restore_state -1: - /* The new frame size is in ip0. */ - - sub PTR_REG (1), PTR_REG (29), ip0l + /* The new frame size is in ip0, extended for pointer size. */ +1: sub x1, sp, ip0 and sp, x1, #0xfffffffffffffff0 str x0, [x29, #OFFSET_T1] @@ -237,42 +227,56 @@ _dl_runtime_profile: ldr ip0, [x29, #OFFSET_T1] - /* Call the function. */ + /* Load the original arguments. */ ldp x0, x1, [x29, #OFFSET_RG + DL_OFFSET_RG_X0 + 16*0] ldp x2, x3, [x29, #OFFSET_RG + DL_OFFSET_RG_X0 + 16*1] ldp x4, x5, [x29, #OFFSET_RG + DL_OFFSET_RG_X0 + 16*2] ldp x6, x7, [x29, #OFFSET_RG + DL_OFFSET_RG_X0 + 16*3] - ldp d0, d1, [x29, #OFFSET_RG + DL_OFFSET_RG_D0 + 16*0] - ldp d2, d3, [x29, #OFFSET_RG + DL_OFFSET_RG_D0 + 16*1] - ldp d4, d5, [x29, #OFFSET_RG + DL_OFFSET_RG_D0 + 16*2] - ldp d6, d7, [x29, #OFFSET_RG + DL_OFFSET_RG_D0 + 16*3] + ldr x8, [x29, 8] + ldp q0, q1, [x29, #OFFSET_SAVED_VEC + 16*0] + ldp q2, q3, [x29, #OFFSET_SAVED_VEC + 16*2] + ldp q4, q5, [x29, #OFFSET_SAVED_VEC + 16*4] + ldp q6, q7, [x29, #OFFSET_SAVED_VEC + 16*6] + + /* Call the function. */ blr ip0 + + /* Save La_aarch64_retval. */ stp x0, x1, [x29, #OFFSET_RV + DL_OFFSET_RV_X0] stp d0, d1, [x29, #OFFSET_RV + DL_OFFSET_RV_D0 + 16*0] stp d2, d3, [x29, #OFFSET_RV + DL_OFFSET_RV_D0 + 16*1] + /* Re-save the full contents of the vector return. */ + stp q0, q1, [x29, #OFFSET_SAVED_VEC + 16*0] + stp q2, q3, [x29, #OFFSET_SAVED_VEC + 16*2] + stp q4, q5, [x29, #OFFSET_SAVED_VEC + 16*4] + stp q6, q7, [x29, #OFFSET_SAVED_VEC + 16*6] + /* Setup call to pltexit */ ldp x0, x1, [x29, #OFFSET_SAVED_CALL_X0] add x2, x29, #OFFSET_RG add x3, x29, #OFFSET_RV bl _dl_call_pltexit + /* Restore the full return value. */ ldp x0, x1, [x29, #OFFSET_RV + DL_OFFSET_RV_X0] - ldp d0, d1, [x29, #OFFSET_RV + DL_OFFSET_RV_D0 + 16*0] - ldp d2, d3, [x29, #OFFSET_RV + DL_OFFSET_RV_D0 + 16*1] + ldp q0, q1, [x29, #OFFSET_SAVED_VEC + 16*0] + ldp q2, q3, [x29, #OFFSET_SAVED_VEC + 16*2] + ldp q4, q5, [x29, #OFFSET_SAVED_VEC + 16*4] + ldp q6, q7, [x29, #OFFSET_SAVED_VEC + 16*6] + /* LR from within La_aarch64_reg */ ldr lr, [x29, #OFFSET_RG + DL_OFFSET_RG_LR] - cfi_restore(lr) mov sp, x29 cfi_def_cfa_register (sp) ldr x29, [x29, #0] - cfi_restore(x29) add sp, sp, SF_SIZE + 16 cfi_adjust_cfa_offset (- SF_SIZE - 16) + cfi_restore(x29) + cfi_restore(lr) br lr cfi_endproc .size _dl_runtime_profile, .-_dl_runtime_profile #endif - .previous