From patchwork Thu Dec 5 05:53:50 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: panchaxari X-Patchwork-Id: 22049 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-pd0-f197.google.com (mail-pd0-f197.google.com [209.85.192.197]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 9BB26202E0 for ; Thu, 5 Dec 2013 05:54:18 +0000 (UTC) Received: by mail-pd0-f197.google.com with SMTP id v10sf45819584pde.4 for ; Wed, 04 Dec 2013 21:54:17 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=0YnjsLp6MAwZgSIYK15c+VD5Z0s+M+vAXXtR32jo/Dc=; b=T9Ax/u2z+5hlOjtWqmToigZ6aJVM3MRSW6fq/z7h6xMJeqYKxl92TMnQI6uRlic4dV 2WeccLeC/u51k86WQfek/iiYgAPy4XakedfAf43J0K49r+FHJjaUlBuUAGORoV2Rws69 xQ4s4UwT1ms0L4QJE+0FACoiT9eJ/C+t8hGTueZayU+IpFYQWj7VOCV+0RDXECyL/Zk+ ZgrIjDkqRQyfO2T7ByEup3BfwRQwf162EtllmdEJGtNbtsXPQl1jU9Gz/WCnqbdrgGWQ k33qxW8mctRth9i5X7HtbbGMDs+rtCUP3bSZ5rtlBBn/+93uZK0A6AUbWJ8ssAFh/A0t 7AYA== X-Gm-Message-State: ALoCoQnb/A88/WH63IFSsmXgNytj0ERJn67JHGF+XhyWLexq5PBdbu+X7KivifI08Kq08Q9vXdU3 X-Received: by 10.66.118.37 with SMTP id kj5mr29032878pab.17.1386222857562; Wed, 04 Dec 2013 21:54:17 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.81.133 with SMTP id a5ls698316qey.21.gmail; Wed, 04 Dec 2013 21:54:17 -0800 (PST) X-Received: by 10.58.208.130 with SMTP id me2mr61798644vec.13.1386222857418; Wed, 04 Dec 2013 21:54:17 -0800 (PST) Received: from mail-vc0-f179.google.com (mail-vc0-f179.google.com [209.85.220.179]) by mx.google.com with ESMTPS id fe2si33865771vcb.16.2013.12.04.21.54.17 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 04 Dec 2013 21:54:17 -0800 (PST) Received-SPF: neutral (google.com: 209.85.220.179 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.220.179; Received: by mail-vc0-f179.google.com with SMTP id ie18so12274000vcb.24 for ; Wed, 04 Dec 2013 21:54:17 -0800 (PST) X-Received: by 10.53.9.201 with SMTP id du9mr2910082vdd.36.1386222857008; Wed, 04 Dec 2013 21:54:17 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp350101vcz; Wed, 4 Dec 2013 21:54:16 -0800 (PST) X-Received: by 10.68.6.66 with SMTP id y2mr49974328pby.60.1386222856172; Wed, 04 Dec 2013 21:54:16 -0800 (PST) Received: from mail-pb0-f51.google.com (mail-pb0-f51.google.com [209.85.160.51]) by mx.google.com with ESMTPS id ai2si56856747pad.320.2013.12.04.21.54.15 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 04 Dec 2013 21:54:16 -0800 (PST) Received-SPF: neutral (google.com: 209.85.160.51 is neither permitted nor denied by best guess record for domain of panchaxari.prasannamurthy@linaro.org) client-ip=209.85.160.51; Received: by mail-pb0-f51.google.com with SMTP id up15so25117563pbc.38 for ; Wed, 04 Dec 2013 21:54:15 -0800 (PST) X-Received: by 10.68.143.196 with SMTP id sg4mr22557603pbb.155.1386222855706; Wed, 04 Dec 2013 21:54:15 -0800 (PST) Received: from si-panchaxari.LGE.NET ([203.247.149.152]) by mx.google.com with ESMTPSA id y9sm163478771pas.10.2013.12.04.21.54.08 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 04 Dec 2013 21:54:13 -0800 (PST) From: panchaxari To: linus.walleij@linaro.org Cc: eric.y.miao@gmail.com, haojian.zhuang@gmail.com, linux@arm.linux.org.uk, patches@linaro.org, linaro-kernel@lists.linaro.org, panchaxari , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH CFT] ARM:MMP: Enable ARM_PATCH_PHYS_VIRT and ZRELADDR default Date: Thu, 5 Dec 2013 11:23:50 +0530 Message-Id: <1386222830-7681-2-git-send-email-panchaxari.prasannamurthy@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1386222830-7681-1-git-send-email-panchaxari.prasannamurthy@linaro.org> References: <1386222830-7681-1-git-send-email-panchaxari.prasannamurthy@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: panchaxari.prasannamurthy@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.179 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , ARM_PATCH_PHYS_VIRT and AUTO_ZRELADDR has been enabled as default configs to Marvell PXA168/910/MMP2 platforms. Introduction of PHYS_VIRT config as default would enable phy-to-virt and virt-to-phy translation function at boot and module loading time and enforce dynamic reallocation of memory. AUTO_ZRELADDR config would enable calculation of kernel load address at run time. PHYS_VIRT config is mutually exclusive to XIP_KERNEL, XIP_KERNEL is used in systems with NOR flash devices, and ZRELADDR config is mutually exclusive to ZBOOT_ROM. CFT::Call For Testing Requesting maintainers of Marvell PXA168/910/MMP2 platforms to evaluate the changes on the board and comment, as I dont have the board for testing and also requesting an ACK Signed-off-by: panchaxari Cc: Eric Miao Cc: Haojian Zhuang Cc: Russell King Cc: Linus Walleij Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org --- arch/arm/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 79ba1a8..13621ed 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -560,6 +560,8 @@ config ARCH_MMP bool "Marvell PXA168/910/MMP2" depends on MMU select ARCH_REQUIRE_GPIOLIB + select ARM_PATCH_PHYS_VIRT + select AUTO_ZRELADDR select CLKDEV_LOOKUP select GENERIC_ALLOCATOR select GENERIC_CLOCKEVENTS