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Wysocki" , Huang Rui CC: , , , , Shuah Khan , , "Nathan Fontenot" , Deepak Sharma , Alex Deucher , Mario Limonciello , Shimmer Huang , "Perry Yuan" , Xiaojian Du , Viresh Kumar , Borislav Petkov , Meng Li Subject: [PATCH V1 0/6] AMD Pstate Preferred Core Date: Tue, 8 Aug 2023 16:09:55 +0800 Message-ID: <20230808081001.2215240-1-li.meng@amd.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000971E2:EE_|CY8PR12MB7585:EE_ X-MS-Office365-Filtering-Correlation-Id: d634f86c-58a5-43a1-f5ed-08db97e6ff81 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: qFoo3tL+ug8jWfHdqYrnFYpJNLeZVwPcYS4oVIp5XzPnosUOe5g867P3WWu25iU8sKybabwa0ML2IQUoL1duwcjatHxOZ+0JaLndWmQFLhYBQ12j0gEEMhOQhwns6pSW9wLAYhK6Z834H+yGWt6bAyZ5x0bQggfNIBKNrRaxjq4RPrqQEldtW+2bq3B6Dtl2EkJapaKbgvQJPGCWsMbuGpc/oXO0QZZx55RBHPftht1eikrYfnKVr3+GOd6OCi9IqvkJRG7A/moSlfiTXH7h6zqeRhyMM2BwyUfWjua9AEpXRzSB6ImIQEu1OvCypzM9f1Uj38hXn4p+snCBy2KcJUchcrgo8+elrNwlxiKsPNxLr9+2F3BvAZAqCVxobRFUpNNBT5OWvYnZVFwJhzyorzyqbNWuZKKiQ2G9tvzofZhUtFDVUIBuBW1dA0lkNVSHVKHIt3OY55iFyL0V0PDV9U0kHyUvnfplnCHXsN3Jh+EdfMzrWeti2Bcqm6lHEJ9HRCqUjGEodIa1BKMJsiUshlYOUmbf/0eADbc4VeYJYejG5yGd3XeZFq1vwsGl+YRRLwkh9hZoBZEX/g8o8sDS7gLUaJsEb37GL3oKozvwVM/fVxj2W/D/og5UZFpXVoVTy+w50PfXR5R8I0mE/XPzifWBReDR68rtCRx07onisum8eztkfQgThWWBEB1RsDuQWJ/olLF+Sq9Ep4/43K9Sv5G8SqmCMBdiU4Ituw/hMy5ldU0bmjIfUyQkU0UWeDBIRP/5q6PsK5UvqcXaotKDlTtT6j85qFJCpu0ZVTZhs+bb3Rg6QEGyASgb62/13bqextzR+8cAy9CrFdwvsC/GtA== X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230028)(4636009)(136003)(39860400002)(396003)(346002)(376002)(82310400008)(1800799003)(186006)(90021799007)(451199021)(90011799007)(46966006)(40470700004)(36840700001)(2616005)(7696005)(1076003)(26005)(36756003)(16526019)(336012)(6666004)(82740400003)(478600001)(81166007)(356005)(110136005)(54906003)(70586007)(70206006)(6636002)(4326008)(41300700001)(426003)(316002)(8936002)(8676002)(5660300002)(40460700003)(2906002)(36860700001)(83380400001)(47076005)(86362001)(40480700001)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Aug 2023 08:10:58.6630 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d634f86c-58a5-43a1-f5ed-08db97e6ff81 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000971E2.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB7585 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Hi all: The core frequency is subjected to the process variation in semiconductors. Not all cores are able to reach the maximum frequency respecting the infrastructure limits. Consequently, AMD has redefined the concept of maximum frequency of a part. This means that a fraction of cores can reach maximum frequency. To find the best process scheduling policy for a given scenario, OS needs to know the core ordering informed by the platform through highest performance capability register of the CPPC interface. Earlier implementations of AMD Pstate Preferred Core only support a static core ranking and targeted performance. Now it has the ability to dynamically change the preferred core based on the workload and platform conditions and accounting for thermals and aging. AMD Pstate driver utilizes the functions and data structures provided by the ITMT architecture to enable the scheduler to favor scheduling on cores which can be get a higher frequency with lower voltage. We call it AMD Pstate Preferrred Core. Here sched_set_itmt_core_prio() is called to set priorities and sched_set_itmt_support() is called to enable ITMT feature. AMD Pstate driver uses the highest performance value to indicate the priority of CPU. The higher value has a higher priority. AMD Pstate driver will provide an initial core ordering at boot time. It relies on the CPPC interface to communicate the core ranking to the operating system and scheduler to make sure that OS is choosing the cores with highest performance firstly for scheduling the process. When AMD Pstate driver receives a message with the highest performance change, it will update the core ranking. Meng Li (6): ACPI: CPPC: Add get the highest performance cppc control cpufreq: amd-pstate: Enable AMD Pstate Preferred Core Supporting. cpufreq: Add a notification message that the highest perf has changed cpufreq: amd-pstate: Update AMD Pstate Preferred Core ranking dynamically Documentation: amd-pstate: introduce AMD Pstate Preferred Core Documentation: introduce AMD Pstate Preferrd Core mode kernel command line options .../admin-guide/kernel-parameters.txt | 5 + Documentation/admin-guide/pm/amd-pstate.rst | 55 ++++++ drivers/acpi/cppc_acpi.c | 13 ++ drivers/acpi/processor_driver.c | 6 + drivers/cpufreq/amd-pstate.c | 181 ++++++++++++++++-- drivers/cpufreq/cpufreq.c | 13 ++ include/acpi/cppc_acpi.h | 5 + include/linux/amd-pstate.h | 1 + include/linux/cpufreq.h | 4 + 9 files changed, 267 insertions(+), 16 deletions(-) Reviewed-by: Mario Limonciello