From patchwork Wed Sep 28 18:17:16 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Fu Wei Fu X-Patchwork-Id: 77091 Delivered-To: patch@linaro.org Received: by 10.140.106.72 with SMTP id d66csp577656qgf; Wed, 28 Sep 2016 11:19:18 -0700 (PDT) X-Received: by 10.98.62.4 with SMTP id l4mr58472684pfa.13.1475086758871; Wed, 28 Sep 2016 11:19:18 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id yr6si9654413pab.4.2016.09.28.11.19.18; Wed, 28 Sep 2016 11:19:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-acpi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-acpi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753541AbcI1STE (ORCPT + 6 others); Wed, 28 Sep 2016 14:19:04 -0400 Received: from mail-pf0-f177.google.com ([209.85.192.177]:34851 "EHLO mail-pf0-f177.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753576AbcI1SSq (ORCPT ); Wed, 28 Sep 2016 14:18:46 -0400 Received: by mail-pf0-f177.google.com with SMTP id s13so19892275pfd.2 for ; Wed, 28 Sep 2016 11:18:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=B4+4wKozhoyAHl2viiCszjSYR3DgCKYAbJjKSmXAu/8=; b=AXi6O9w35bxW5f7WAnYAsK7Dx5146WEHzcbmOZLyZpxBCeHH28TUzEkUACdVxRtt0Z 90tx1EfdWED1suW4mPgHEzdUsIc+WRGNAGFV3S8iVhwZAJNZc9jzQA+3OaTG0J1MnFIa lRIgbOA7J8v4sQ3qGc77QvcVTGrkfvebnVBmQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=B4+4wKozhoyAHl2viiCszjSYR3DgCKYAbJjKSmXAu/8=; b=hTHcHLDHHFGnM+2xomSdiMKWQtEeRlW8WvnN6DHLkhCopyUPycjX7PUzbnp/fJuGLx 9h9AVKSEkrhiXmsYym3d8Ex+BjSnmNfsOOe8rdR05DFEHca0X8h5UfmVZcT9UlnzoVF0 nN01vGq0GIwJVfA93UraBncY3+W7Go8B2UrDNiRn3HYCF+JP/PCK8wVifuMmjdoSjya3 xUp1HFomBm1CiYJyQ1horxQelT3rkXgDslvZS1F+sgtKyiypdmVPMfm4oeUZDLMclg74 +liKsUIRjVroxqo4x4qmT7mSFl3BFWRbBbtSuYNmKO/WzYatLrShU7wxB8nOukfPLd8R /4iw== X-Gm-Message-State: AE9vXwNgcgIhht7cYD/PfLFqEdVKS34XHaveYdLrjebhrnqyOPwllCb1pnj76FVr4fDv0WNJ X-Received: by 10.98.104.71 with SMTP id d68mr59706323pfc.163.1475086725947; Wed, 28 Sep 2016 11:18:45 -0700 (PDT) Received: from Rei-Ayanami.localdomain.localdomain ([67.238.99.186]) by smtp.googlemail.com with ESMTPSA id ak3sm14226365pad.19.2016.09.28.11.18.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 28 Sep 2016 11:18:45 -0700 (PDT) From: fu.wei@linaro.org To: rjw@rjwysocki.net, lenb@kernel.org, daniel.lezcano@linaro.org, tglx@linutronix.de, marc.zyngier@arm.com, mark.rutland@arm.com, lorenzo.pieralisi@arm.com, sudeep.holla@arm.com, hanjun.guo@linaro.org Cc: linux-arm-kernel@lists.infradead.org, linaro-acpi@lists.linaro.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, rruigrok@codeaurora.org, harba@codeaurora.org, cov@codeaurora.org, timur@codeaurora.org, graeme.gregory@linaro.org, al.stone@linaro.org, jcm@redhat.com, wei@redhat.com, arnd@arndb.de, catalin.marinas@arm.com, will.deacon@arm.com, Suravee.Suthikulpanit@amd.com, leo.duran@amd.com, wim@iguana.be, linux@roeck-us.net, linux-watchdog@vger.kernel.org, tn@semihalf.com, christoffer.dall@linaro.org, julien.grall@arm.com, Fu Wei Subject: [PATCH v14 8/9] clocksource/drivers/arm_arch_timer: Add GTDT support for memory-mapped timer Date: Thu, 29 Sep 2016 02:17:16 +0800 Message-Id: <1475086637-1914-9-git-send-email-fu.wei@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1475086637-1914-1-git-send-email-fu.wei@linaro.org> References: <1475086637-1914-1-git-send-email-fu.wei@linaro.org> MIME-Version: 1.0 Sender: linux-acpi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org From: Fu Wei The patch add memory-mapped timer register support by using the information provided by the new GTDT driver of ACPI. Signed-off-by: Fu Wei --- drivers/clocksource/arm_arch_timer.c | 92 +++++++++++++++++++++++++++++++++--- 1 file changed, 85 insertions(+), 7 deletions(-) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe linux-acpi" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index e78095f..8482fba 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -660,6 +660,7 @@ out: static int __init arch_timer_mem_register(struct device_node *np, void *frame) { struct device_node *frame_node = NULL; + struct gt_timer_data *frame_data = NULL; struct arch_timer *t; void __iomem *base; irq_handler_t func; @@ -678,8 +679,17 @@ static int __init arch_timer_mem_register(struct device_node *np, void *frame) else irq = irq_of_parse_and_map(frame_node, PHYS_SPI); } else { - pr_err("Device node is missing.\n"); - return -EINVAL; + frame_data = (struct gt_timer_data *)frame; + /* + * According to ARMv8 Architecture Reference Manual(ARM), + * the size of CNTBaseN frames of memory-mapped timer + * is SZ_4K(Offset 0x000 – 0xFFF). + */ + base = ioremap(frame_data->cntbase_phy, SZ_4K); + if (arch_timer_mem_use_virtual) + irq = frame_data->virtual_irq; + else + irq = frame_data->irq; } if (!base) { @@ -840,13 +850,16 @@ static int __init arch_timer_of_init(struct device_node *np) CLOCKSOURCE_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", arch_timer_of_init); CLOCKSOURCE_OF_DECLARE(armv8_arch_timer, "arm,armv8-timer", arch_timer_of_init); -static int __init get_cnttidr(struct device_node *np, u32 *cnttidr) +static int __init get_cnttidr(struct device_node *np, + struct gt_block_data *gt_block, u32 *cnttidr) { if (!cnttidr) return -EINVAL; if (np) cntctlbase = of_iomap(np, 0); + else if (gt_block) + cntctlbase = ioremap(gt_block->cntctlbase_phy, SZ_4K); else return -EINVAL; @@ -885,7 +898,7 @@ static int __init arch_timer_mem_init(struct device_node *np) arch_timers_present |= ARCH_MEM_TIMER; - ret = get_cnttidr(np, &cnttidr); + ret = get_cnttidr(np, NULL, &cnttidr); if (ret) return ret; @@ -921,7 +934,72 @@ CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem", arch_timer_mem_init); #ifdef CONFIG_ACPI_GTDT -/* Initialize per-processor generic timer */ +static struct gt_timer_data __init *arch_timer_mem_get_timer( + struct gt_block_data *gt_blocks) +{ + struct gt_block_data *gt_block = gt_blocks; + struct gt_timer_data *best_frame = NULL; + u32 cnttidr; + int i; + + if (get_cnttidr(NULL, gt_block, &cnttidr)) + return NULL; + /* + * Try to find a virtual capable frame. Otherwise fall back to a + * physical capable frame. + */ + for (i = 0; i < gt_block->timer_count; i++) { + if (is_best_frame(cnttidr, gt_block->timer[i].frame_nr)) { + best_frame = >_block->timer[i]; + if (arch_timer_mem_use_virtual) + break; + } + } + iounmap(cntctlbase); + + return best_frame; +} + +static int __init arch_timer_mem_acpi_init(size_t timer_count) +{ + struct gt_block_data *gt_blocks; + struct gt_timer_data *gt_timer; + int ret = -EINVAL; + + /* + * If we don't have any Platform Timer Structures, just return. + */ + if (!timer_count) + return 0; + + /* + * before really check all the Platform Timer Structures, + * we assume they are GT block, and allocate memory for them. + * We will free these memory once we finish the initialization. + */ + gt_blocks = kcalloc(timer_count, sizeof(*gt_blocks), GFP_KERNEL); + if (!gt_blocks) + return -ENOMEM; + + if (gtdt_arch_timer_mem_init(gt_blocks) > 0) { + gt_timer = arch_timer_mem_get_timer(gt_blocks); + if (!gt_timer) { + pr_err("Failed to get mem timer info.\n"); + goto error; + } + ret = arch_timer_mem_register(NULL, gt_timer); + if (ret) { + pr_err("Failed to register mem timer.\n"); + goto error; + } + } + arch_timers_present |= ARCH_MEM_TIMER; +error: + kfree(gt_blocks); + return ret; +} + +/* Initialize per-processor generic timer and memory-mapped timer(if present) */ static int __init arch_timer_acpi_init(struct acpi_table_header *table) { int timer_count; @@ -945,8 +1023,8 @@ static int __init arch_timer_acpi_init(struct acpi_table_header *table) /* Get the frequency from CNTFRQ */ arch_timer_detect_rate(NULL, NULL); - if (timer_count < 0) - pr_err("Failed to get platform timer info.\n"); + if (timer_count < 0 || arch_timer_mem_acpi_init((size_t)timer_count)) + pr_err("Failed to initialize memory-mapped timer.\n"); return arch_timer_init(); }