| Message ID | 20211206122952.74139-2-kirill.shutemov@linux.intel.com |
|---|---|
| State | Accepted |
| Commit | 1d4e0b3abb168b2ee1eca99c527cffa1b80b6161 |
| Headers | show |
| Series | ACPI/ACPICA: Only flush caches on S1/S2/S3 and C3 | expand |
On Mon, Dec 6, 2021 at 1:30 PM Kirill A. Shutemov <kirill.shutemov@linux.intel.com> wrote: > > According to the ACPI spec v6.4, section 16.2 the cache flushing is > required on entering to S1, S2, and S3. ACPICA code flushes cache > regardless of the sleep state. > > Blind cache flush on entering S5 causes problems for TDX. Flushing > happens with WBINVD that is not supported in the TDX environment. > > TDX only supports S5 and adjusting ACPICA code to conform to the spec > fixes the issue. > > Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> I've converted this patch to the upstream ACPICA code base format and submitted a pull request with it to the upstream project. Thanks! > --- > drivers/acpi/acpica/hwesleep.c | 3 ++- > drivers/acpi/acpica/hwsleep.c | 3 ++- > drivers/acpi/acpica/hwxfsleep.c | 2 -- > 3 files changed, 4 insertions(+), 4 deletions(-) > > diff --git a/drivers/acpi/acpica/hwesleep.c b/drivers/acpi/acpica/hwesleep.c > index 808fdf54aeeb..ceb5a4292efa 100644 > --- a/drivers/acpi/acpica/hwesleep.c > +++ b/drivers/acpi/acpica/hwesleep.c > @@ -104,7 +104,8 @@ acpi_status acpi_hw_extended_sleep(u8 sleep_state) > > /* Flush caches, as per ACPI specification */ > > - ACPI_FLUSH_CPU_CACHE(); > + if (sleep_state < ACPI_STATE_S4) > + ACPI_FLUSH_CPU_CACHE(); > > status = acpi_os_enter_sleep(sleep_state, sleep_control, 0); > if (status == AE_CTRL_TERMINATE) { > diff --git a/drivers/acpi/acpica/hwsleep.c b/drivers/acpi/acpica/hwsleep.c > index 34a3825f25d3..ee094a3aaaab 100644 > --- a/drivers/acpi/acpica/hwsleep.c > +++ b/drivers/acpi/acpica/hwsleep.c > @@ -110,7 +110,8 @@ acpi_status acpi_hw_legacy_sleep(u8 sleep_state) > > /* Flush caches, as per ACPI specification */ > > - ACPI_FLUSH_CPU_CACHE(); > + if (sleep_state < ACPI_STATE_S4) > + ACPI_FLUSH_CPU_CACHE(); > > status = acpi_os_enter_sleep(sleep_state, pm1a_control, pm1b_control); > if (status == AE_CTRL_TERMINATE) { > diff --git a/drivers/acpi/acpica/hwxfsleep.c b/drivers/acpi/acpica/hwxfsleep.c > index e4cde23a2906..ba77598ee43e 100644 > --- a/drivers/acpi/acpica/hwxfsleep.c > +++ b/drivers/acpi/acpica/hwxfsleep.c > @@ -162,8 +162,6 @@ acpi_status acpi_enter_sleep_state_s4bios(void) > return_ACPI_STATUS(status); > } > > - ACPI_FLUSH_CPU_CACHE(); > - > status = acpi_hw_write_port(acpi_gbl_FADT.smi_command, > (u32)acpi_gbl_FADT.s4_bios_request, 8); > if (ACPI_FAILURE(status)) { > -- > 2.32.0 >
diff --git a/drivers/acpi/acpica/hwesleep.c b/drivers/acpi/acpica/hwesleep.c index 808fdf54aeeb..ceb5a4292efa 100644 --- a/drivers/acpi/acpica/hwesleep.c +++ b/drivers/acpi/acpica/hwesleep.c @@ -104,7 +104,8 @@ acpi_status acpi_hw_extended_sleep(u8 sleep_state) /* Flush caches, as per ACPI specification */ - ACPI_FLUSH_CPU_CACHE(); + if (sleep_state < ACPI_STATE_S4) + ACPI_FLUSH_CPU_CACHE(); status = acpi_os_enter_sleep(sleep_state, sleep_control, 0); if (status == AE_CTRL_TERMINATE) { diff --git a/drivers/acpi/acpica/hwsleep.c b/drivers/acpi/acpica/hwsleep.c index 34a3825f25d3..ee094a3aaaab 100644 --- a/drivers/acpi/acpica/hwsleep.c +++ b/drivers/acpi/acpica/hwsleep.c @@ -110,7 +110,8 @@ acpi_status acpi_hw_legacy_sleep(u8 sleep_state) /* Flush caches, as per ACPI specification */ - ACPI_FLUSH_CPU_CACHE(); + if (sleep_state < ACPI_STATE_S4) + ACPI_FLUSH_CPU_CACHE(); status = acpi_os_enter_sleep(sleep_state, pm1a_control, pm1b_control); if (status == AE_CTRL_TERMINATE) { diff --git a/drivers/acpi/acpica/hwxfsleep.c b/drivers/acpi/acpica/hwxfsleep.c index e4cde23a2906..ba77598ee43e 100644 --- a/drivers/acpi/acpica/hwxfsleep.c +++ b/drivers/acpi/acpica/hwxfsleep.c @@ -162,8 +162,6 @@ acpi_status acpi_enter_sleep_state_s4bios(void) return_ACPI_STATUS(status); } - ACPI_FLUSH_CPU_CACHE(); - status = acpi_hw_write_port(acpi_gbl_FADT.smi_command, (u32)acpi_gbl_FADT.s4_bios_request, 8); if (ACPI_FAILURE(status)) {
According to the ACPI spec v6.4, section 16.2 the cache flushing is required on entering to S1, S2, and S3. ACPICA code flushes cache regardless of the sleep state. Blind cache flush on entering S5 causes problems for TDX. Flushing happens with WBINVD that is not supported in the TDX environment. TDX only supports S5 and adjusting ACPICA code to conform to the spec fixes the issue. Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> --- drivers/acpi/acpica/hwesleep.c | 3 ++- drivers/acpi/acpica/hwsleep.c | 3 ++- drivers/acpi/acpica/hwxfsleep.c | 2 -- 3 files changed, 4 insertions(+), 4 deletions(-)