From patchwork Thu Aug 31 06:20:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Evan Quan X-Patchwork-Id: 719538 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8CC42C83F2F for ; Thu, 31 Aug 2023 06:22:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343818AbjHaGWO (ORCPT ); Thu, 31 Aug 2023 02:22:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43982 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345163AbjHaGWD (ORCPT ); Thu, 31 Aug 2023 02:22:03 -0400 Received: from NAM10-MW2-obe.outbound.protection.outlook.com (mail-mw2nam10on2072.outbound.protection.outlook.com [40.107.94.72]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 17246CE6; Wed, 30 Aug 2023 23:21:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=IU2w+qE194con9dOK8D0ttev5BpQP49rocTKHqI5f4ngsWhP8s9R4pqC9BVAE57+5n47OqIAb4PDk6beat/jM9VXhfCqqA5DrFTWTlp5DzK3d2gpimYBvsINjeWQf90ZkL71q87erFwQH2B5+/kV+eQCoYSikfDHIsb9zqxJ/Mu56ffpng8aj+DtKs73U57XaQgf3ODYOs7NXH30jrlgKtekukFes1Nq6QM+OBu88lqwXRcDIbjBGSL//8AGpY0TlGV+2ntdRt5AiOLkfPcmwfHYQvA45z4MotMWdcMLLRdP1GS6U7vv94NqZgGRoALmrF31MbVudmDQv5AbzWRaAA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=Htd1mFxSVlkhYdvRivRi0EXb5chfu+1IcqJXQMj8ays=; b=j3DPkNKDWWBqM7kC67L59wVf5lqCFCvjn96UvwPAGwcUamGWkw5QeY2Pi045f/uVwIZc2Jf77KYiPq5VyooH7Az5rkXgUrUo6rO6EuywI7B52AWPxN5QEM4vgyG53/yMcC1T7tfRemN0zUQsRngwFFMqk46gUqY0TOYKWAJW6cc2nI44mYQzxQwCtypRT2JmHjIZB2j5UsX4xm5G4cgowO4g2BSO7HeICXZuFMat/gh4vHU8I0ARAuvFGkLJ5d2IMax4gnzhLgr5L21alRyGh7AQzGYATjcfBNEs4SXp/+oDPgToDfeZKYrOYm+FK/+s2bP93VYTDnBdfW9/QchK3w== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=kernel.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Htd1mFxSVlkhYdvRivRi0EXb5chfu+1IcqJXQMj8ays=; b=L5hbIG5emU8HhpS1qWu5GpwYQWq+RJqvSjPJsbwjynk4ggJb1/QzvBkErJx8InwAtJuSkuOA5SQQ6eBQWgkv8Bm5BxLyBnBwp+8hmPHh/q+hSvXuHOZ20CObUHW93eGpDbc5xAtcM7f4aERG32dNi/vgnFs7q1XFD8ot84OkOlQ= Received: from MW2PR2101CA0017.namprd21.prod.outlook.com (2603:10b6:302:1::30) by PH0PR12MB7813.namprd12.prod.outlook.com (2603:10b6:510:286::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6699.34; Thu, 31 Aug 2023 06:21:28 +0000 Received: from CO1PEPF000044F9.namprd21.prod.outlook.com (2603:10b6:302:1:cafe::77) by MW2PR2101CA0017.outlook.office365.com (2603:10b6:302:1::30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6768.12 via Frontend Transport; Thu, 31 Aug 2023 06:21:27 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CO1PEPF000044F9.mail.protection.outlook.com (10.167.241.199) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6768.2 via Frontend Transport; Thu, 31 Aug 2023 06:21:27 +0000 Received: from equan-buildpc.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Thu, 31 Aug 2023 01:21:22 -0500 From: Evan Quan To: , , , , , , , , , CC: , , , , , , Evan Quan Subject: [V11 5/8] drm/amd/pm: setup the framework to support Wifi RFI mitigation feature Date: Thu, 31 Aug 2023 14:20:28 +0800 Message-ID: <20230831062031.1014799-6-evan.quan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230831062031.1014799-1-evan.quan@amd.com> References: <20230831062031.1014799-1-evan.quan@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044F9:EE_|PH0PR12MB7813:EE_ X-MS-Office365-Filtering-Correlation-Id: c832d08e-2f68-4561-958e-08dba9ea827c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: fuWmiCg1Nyk+ioy/iIJmeA2dNHTJtWBjRZZfhT1WNF7wkYd0vWqPIURWh7JglWu6nhXg7Df8W24mx4cgWXODmpOcj1ld0WCFkykXUukSXyjUz5fWmglUoDbUblneyDxGaAi+RcDO5Z9GUkWHgdLsuJfWPp+KSN88G8S36/oDBaKJ02yov4N3bPjI2V/u+SwZFhSbSUqJNleZdlmP6QeVNf/8bLMeRw7cx/gGRvwU7Mj9+ZvzpB3wWS8CYmdhGhW2wzi3+WCnCBVqsK9EXpGGxKGJJiN78sMEIyvWArfHMlqgDI1UDp+g0f2pfM7t5AcspggzcAN7BPDOXktgx6nVu64iGZ0js3ckD5n89KISLuCMl5A40UIm56FAf1wFbzt4TRLew/u3FR2Vh3o5F3pF1lg62CETrK4tNMV0ca4eoOL1i47+BMYmUCWU1Rc7b3Mq5NIuSZSMegAOCZ+k7oscu/OpcfIg/kZHOawwfOi4skd1WzaZA8eGH05SwzGljskIIanWMucmIZLlkl09+OWbIpRVQdmlmhhoCydBwpYFgKLGT9GgOV0SNBrUv/W2qWrZ3/RuNhyDdBNNaROzwPL1H2ZzMP1xZCmsrSUl70ljKG2MauxAWbuwkRumdRdC07HfuW08KCOJgWuM/2EKNvqLQCxl89e0PHN3qj6aMhnQbVLGEPWg051HURhAZ0EnDfk9CRO6qTNCrx27Kcat9bhfOk7+NNDwgxeJmUiRdoBTumvFv/GjnjDJw7RD+SF8vTg+T7LwrqS+xuh0vjQNRMU9NUunUWnZ7fGmY9Jea4at4vvF6i+U6SmgcdbmoAnfdljz X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(4636009)(136003)(346002)(376002)(39860400002)(396003)(1800799009)(451199024)(186009)(82310400011)(40470700004)(46966006)(36840700001)(82740400003)(7696005)(110136005)(70206006)(86362001)(40480700001)(356005)(81166007)(36756003)(47076005)(921005)(36860700001)(2616005)(426003)(26005)(16526019)(336012)(83380400001)(1076003)(40460700003)(54906003)(8936002)(478600001)(44832011)(5660300002)(7416002)(2906002)(30864003)(8676002)(70586007)(41300700001)(6636002)(316002)(4326008)(36900700001)(309714004); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Aug 2023 06:21:27.8138 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c832d08e-2f68-4561-958e-08dba9ea827c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044F9.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB7813 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org With WBRF feature supported, as a driver responding to the frequencies, amdgpu driver is able to do shadow pstate switching to mitigate possible interference(between its (G-)DDR memory clocks and local radio module frequency bands used by Wifi 6/6e/7). Signed-off-by: Evan Quan Reviewed-by: Mario Limonciello --- v1->v2: - update the prompt for feature support(Lijo) v8->v9: - update parameter document for smu_wbrf_event_handler(Simon) v9->v10: v10->v11: - correct the logics for wbrf range sorting(Lijo) --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 + drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 17 ++ drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 195 ++++++++++++++++++ drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 23 +++ drivers/gpu/drm/amd/pm/swsmu/smu_internal.h | 3 + 5 files changed, 240 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index 97cb56c791f3..47595b892c1f 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -246,6 +246,8 @@ extern int amdgpu_sg_display; extern int amdgpu_user_partt_mode; +extern int amdgpu_wbrf; + #define AMDGPU_VM_MAX_NUM_CTX 4096 #define AMDGPU_SG_THRESHOLD (256*1024*1024) #define AMDGPU_WAIT_IDLE_TIMEOUT_IN_MS 3000 diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c index 7691177d87aa..c7231ad89aa0 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c @@ -195,6 +195,7 @@ int amdgpu_use_xgmi_p2p = 1; int amdgpu_vcnfw_log; int amdgpu_sg_display = -1; /* auto */ int amdgpu_user_partt_mode = AMDGPU_AUTO_COMPUTE_PARTITION_MODE; +int amdgpu_wbrf = -1; static void amdgpu_drv_delayed_reset_work_handler(struct work_struct *work); @@ -978,6 +979,22 @@ module_param_named(user_partt_mode, amdgpu_user_partt_mode, uint, 0444); module_param(enforce_isolation, bool, 0444); MODULE_PARM_DESC(enforce_isolation, "enforce process isolation between graphics and compute . enforce_isolation = on"); +/** + * DOC: wbrf (int) + * Enable Wifi RFI interference mitigation feature. + * Due to electrical and mechanical constraints there may be likely interference of + * relatively high-powered harmonics of the (G-)DDR memory clocks with local radio + * module frequency bands used by Wifi 6/6e/7. To mitigate the possible RFI interference, + * with this feature enabled, PMFW will use either “shadowed P-State” or “P-State” based + * on active list of frequencies in-use (to be avoided) as part of initial setting or + * P-state transition. However, there may be potential performance impact with this + * feature enabled. + * (0 = disabled, 1 = enabled, -1 = auto (default setting, will be enabled if supported)) + */ +MODULE_PARM_DESC(wbrf, + "Enable Wifi RFI interference mitigation (0 = disabled, 1 = enabled, -1 = auto(default)"); +module_param_named(wbrf, amdgpu_wbrf, int, 0444); + /* These devices are not supported by amdgpu. * They are supported by the mach64, r128, radeon drivers */ diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c index 222af2fae745..bac2a362a2fc 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c @@ -1228,6 +1228,174 @@ static int smu_get_thermal_temperature_range(struct smu_context *smu) return ret; } +/** + * smu_wbrf_handle_exclusion_ranges - consume the wbrf exclusion ranges + * + * @smu: smu_context pointer + * + * Retrieve the wbrf exclusion ranges and send them to PMFW for proper handling. + * Returns 0 on success, error on failure. + */ +static int smu_wbrf_handle_exclusion_ranges(struct smu_context *smu) +{ + struct wbrf_ranges_in_out wbrf_exclusion = {0}; + struct exclusion_range *wifi_bands = wbrf_exclusion.band_list; + struct amdgpu_device *adev = smu->adev; + uint32_t num_of_wbrf_ranges = MAX_NUM_OF_WBRF_RANGES; + uint64_t start, end; + int ret, i, j; + + ret = acpi_amd_wbrf_retrieve_exclusions(adev->dev, &wbrf_exclusion); + if (ret) { + dev_err(adev->dev, "Failed to retrieve exclusion ranges!\n"); + return ret; + } + + /* + * The exclusion ranges array we got might be filled with holes and duplicate + * entries. For example: + * {(2400, 2500), (0, 0), (6882, 6962), (2400, 2500), (0, 0), (6117, 6189), (0, 0)...} + * We need to do some sortups to eliminate those holes and duplicate entries. + * Expected output: {(2400, 2500), (6117, 6189), (6882, 6962), (0, 0)...} + */ + for (i = 0; i < num_of_wbrf_ranges; i++) { + start = wifi_bands[i].start; + end = wifi_bands[i].end; + + /* get the last valid entry to fill the intermediate hole */ + if (!start && !end) { + for (j = num_of_wbrf_ranges - 1; j > i; j--) + if (wifi_bands[j].start && + wifi_bands[j].end) + break; + + /* no valid entry left */ + if (j <= i) + break; + + start = wifi_bands[i].start = wifi_bands[j].start; + end = wifi_bands[i].end = wifi_bands[j].end; + wifi_bands[j].start = 0; + wifi_bands[j].end = 0; + num_of_wbrf_ranges = j; + } + + /* eliminate duplicate entries */ + for (j = i + 1; j < num_of_wbrf_ranges; j++) { + if ((wifi_bands[j].start == start) && + (wifi_bands[j].end == end)) { + wifi_bands[j].start = 0; + wifi_bands[j].end = 0; + } + } + } + + /* Send the sorted wifi_bands to PMFW */ + ret = smu_set_wbrf_exclusion_ranges(smu, wifi_bands); + /* Give it another chance */ + if (unlikely(ret == -EBUSY)) { + mdelay(5); + ret = smu_set_wbrf_exclusion_ranges(smu, wifi_bands); + } + + return ret; +} + +/** + * smu_wbrf_event_handler - handle notify events + * + * @nb: notifier block + * @action: event type + * @_arg: event data + * + * Calls relevant amdgpu function in response to wbrf event + * notification from kernel. + */ +static int smu_wbrf_event_handler(struct notifier_block *nb, + unsigned long action, void *_arg) +{ + struct smu_context *smu = container_of(nb, struct smu_context, + wbrf_notifier); + + switch (action) { + case WBRF_CHANGED: + smu_wbrf_handle_exclusion_ranges(smu); + break; + default: + return NOTIFY_DONE; + }; + + return NOTIFY_OK; +} + +/** + * smu_wbrf_support_check - check wbrf support + * + * @smu: smu_context pointer + * + * Verifies the ACPI interface whether wbrf is supported. + */ +static void smu_wbrf_support_check(struct smu_context *smu) +{ + struct amdgpu_device *adev = smu->adev; + + smu->wbrf_supported = smu_is_asic_wbrf_supported(smu) && + !!amdgpu_wbrf && + acpi_amd_wbrf_supported_consumer(adev->dev); + + if (smu->wbrf_supported) + dev_info(adev->dev, "RF interference mitigation is supported\n"); +} + +/** + * smu_wbrf_init - init driver wbrf support + * + * @smu: smu_context pointer + * + * Verifies the AMD ACPI interfaces and registers with the wbrf + * notifier chain if wbrf feature is supported. + * Returns 0 on success, error on failure. + */ +static int smu_wbrf_init(struct smu_context *smu) +{ + struct amdgpu_device *adev = smu->adev; + int ret; + + if (!smu->wbrf_supported) + return 0; + + smu->wbrf_notifier.notifier_call = smu_wbrf_event_handler; + ret = acpi_amd_wbrf_register_notifier(&smu->wbrf_notifier); + if (ret) + return ret; + + /* + * Some wifiband exclusion ranges may be already there + * before our driver loaded. To make sure our driver + * is awared of those exclusion ranges. + */ + ret = smu_wbrf_handle_exclusion_ranges(smu); + if (ret) + dev_err(adev->dev, "Failed to handle wbrf exclusion ranges\n"); + + return ret; +} + +/** + * smu_wbrf_fini - tear down driver wbrf support + * + * @smu: smu_context pointer + * + * Unregisters with the wbrf notifier chain. + */ +static void smu_wbrf_fini(struct smu_context *smu) +{ + if (!smu->wbrf_supported) + return; + + acpi_amd_wbrf_unregister_notifier(&smu->wbrf_notifier); +} + static int smu_smc_hw_setup(struct smu_context *smu) { struct smu_feature *feature = &smu->smu_feature; @@ -1320,6 +1488,15 @@ static int smu_smc_hw_setup(struct smu_context *smu) if (ret) return ret; + /* Enable UclkShadow on wbrf supported */ + if (smu->wbrf_supported) { + ret = smu_enable_uclk_shadow(smu, true); + if (ret) { + dev_err(adev->dev, "Failed to enable UclkShadow feature to support wbrf!\n"); + return ret; + } + } + /* * With SCPM enabled, these actions(and relevant messages) are * not needed and permitted. @@ -1416,6 +1593,15 @@ static int smu_smc_hw_setup(struct smu_context *smu) */ ret = smu_set_min_dcef_deep_sleep(smu, smu->smu_table.boot_values.dcefclk / 100); + if (ret) { + dev_err(adev->dev, "Error setting min deepsleep dcefclk\n"); + return ret; + } + + /* Init wbrf support. Properly setup the notifier */ + ret = smu_wbrf_init(smu); + if (ret) + dev_err(adev->dev, "Error during wbrf init call\n"); return ret; } @@ -1471,6 +1657,13 @@ static int smu_hw_init(void *handle) return ret; } + /* + * Check whether wbrf is supported. This needs to be done + * before SMU setup starts since part of SMU configuration + * relies on this. + */ + smu_wbrf_support_check(smu); + if (smu->is_apu) { ret = smu_set_gfx_imu_enable(smu); if (ret) @@ -1623,6 +1816,8 @@ static int smu_smc_hw_cleanup(struct smu_context *smu) struct amdgpu_device *adev = smu->adev; int ret = 0; + smu_wbrf_fini(smu); + cancel_work_sync(&smu->throttling_logging_work); cancel_work_sync(&smu->interrupt_work); diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h index 6e2069dcb6b9..3eb1c72a76f1 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h +++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h @@ -22,6 +22,8 @@ #ifndef __AMDGPU_SMU_H__ #define __AMDGPU_SMU_H__ +#include + #include "amdgpu.h" #include "kgd_pp_interface.h" #include "dm_pp_interface.h" @@ -575,6 +577,10 @@ struct smu_context u32 debug_resp_reg; struct delayed_work swctf_delayed_work; + + /* data structures for wbrf feature support */ + bool wbrf_supported; + struct notifier_block wbrf_notifier; }; struct i2c_adapter; @@ -1356,6 +1362,23 @@ struct pptable_funcs { * @init_pptable_microcode: Prepare the pptable microcode to upload via PSP */ int (*init_pptable_microcode)(struct smu_context *smu); + + /** + * @is_asic_wbrf_supported: check whether PMFW supports the wbrf feature + */ + bool (*is_asic_wbrf_supported)(struct smu_context *smu); + + /** + * @enable_uclk_shadow: Enable the uclk shadow feature on wbrf supported + */ + int (*enable_uclk_shadow)(struct smu_context *smu, + bool enablement); + + /** + * @set_wbrf_exclusion_ranges: notify SMU the wifi bands occupied + */ + int (*set_wbrf_exclusion_ranges)(struct smu_context *smu, + struct exclusion_range *exclusion_ranges); }; typedef enum { diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h b/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h index ceb13c838067..67d7495ab49e 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h +++ b/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h @@ -97,6 +97,9 @@ #define smu_get_default_config_table_settings(smu, config_table) smu_ppt_funcs(get_default_config_table_settings, -EOPNOTSUPP, smu, config_table) #define smu_set_config_table(smu, config_table) smu_ppt_funcs(set_config_table, -EOPNOTSUPP, smu, config_table) #define smu_init_pptable_microcode(smu) smu_ppt_funcs(init_pptable_microcode, 0, smu) +#define smu_is_asic_wbrf_supported(smu) smu_ppt_funcs(is_asic_wbrf_supported, false, smu) +#define smu_enable_uclk_shadow(smu, enablement) smu_ppt_funcs(enable_uclk_shadow, 0, smu, enablement) +#define smu_set_wbrf_exclusion_ranges(smu, exclusion_ranges) smu_ppt_funcs(set_wbrf_exclusion_ranges, -EOPNOTSUPP, smu, exclusion_ranges) #endif #endif