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Wysocki" , Len Brown , Bjorn Helgaas , Anup Patel , Thomas Gleixner , Greg Kroah-Hartman , Jiri Slaby , Conor Dooley , Andrew Jones , Atish Kumar Patra , Haibo Xu , Sunil V L Subject: [RFC PATCH v2 18/21] irqchip: riscv-intc: Set ACPI irqmodel Date: Thu, 26 Oct 2023 01:53:41 +0530 Message-Id: <20231025202344.581132-19-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231025202344.581132-1-sunilvl@ventanamicro.com> References: <20231025202344.581132-1-sunilvl@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Spam-Level: * INTC being the root interrupt controller, set the ACPI irqmodel with callback function to get the GSI domain id. Signed-off-by: Sunil V L --- drivers/irqchip/irq-riscv-intc.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-riscv-intc.c index f3aaecde12dd..627723d72b01 100644 --- a/drivers/irqchip/irq-riscv-intc.c +++ b/drivers/irqchip/irq-riscv-intc.c @@ -273,6 +273,17 @@ int acpi_get_imsic_mmio_info(u32 index, struct resource *res) return 0; } +static struct fwnode_handle *riscv_get_gsi_domain_id(u32 gsi) +{ + struct fwnode_handle *gsi_fwnode = NULL; + + gsi_fwnode = aplic_get_gsi_domain_id(gsi); + if (!gsi_fwnode) + gsi_fwnode = plic_get_gsi_domain_id(gsi); + + return gsi_fwnode; +} + static int __init riscv_intc_acpi_init(union acpi_subtable_headers *header, const unsigned long end) { @@ -318,6 +329,7 @@ static int __init riscv_intc_acpi_init(union acpi_subtable_headers *header, * unsupported. Once IMSIC is probed, MSI support will be set. */ pci_no_msi(); + acpi_set_irq_model(ACPI_IRQ_MODEL_RINTC, riscv_get_gsi_domain_id); return 0; }