From patchwork Tue Dec 19 17:45:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 757496 Received: from mail-pl1-f181.google.com (mail-pl1-f181.google.com [209.85.214.181]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BEBBB41209 for ; Tue, 19 Dec 2023 17:47:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="OwdMO+Dy" Received: by mail-pl1-f181.google.com with SMTP id d9443c01a7336-1d337dc9697so39048955ad.3 for ; Tue, 19 Dec 2023 09:47:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1703008025; x=1703612825; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=XaVzwwT2ecLOtMDBM5TdFJiJ9XdFZ6MUpboDwIj/4ug=; b=OwdMO+DyVotX9tmk1xRIsraAElYFlr5ThzaBzSh7oPVDYa8hsVFFb6066ici19XRHg Y6WBeMXC2BPYDoydWlpIfBi4CgE/GG5YE9CDZHsxTlXlACfJQ8IEDxBwvrcc6hDl+gpP +eNPO7GMP+ddTzRoRXZqfLmhnFBJN6IOVi+mCM4crUVLjXyCkuEi38cW/8eHyEfZaVe5 wCsfexqpWND6NugDDnaHgMaw5FZnfswZAnCRygZ64HnkwiNNvktxEmB5D59MlXtx4g4M XI1VbKpv1GGbtTG1FwOusSamDObMBU90lQ4FW/j218mKBgCFCfWDlO0yYAiUworYFrBj xmXg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703008025; x=1703612825; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=XaVzwwT2ecLOtMDBM5TdFJiJ9XdFZ6MUpboDwIj/4ug=; b=BgyZwkz92aAKABY2Q/UliSCmY0rZYyXQlCGuI9jszd06qSYQValJZy9JZHyrj6BUKf X4xuBuJU9s+xX9ciqsPM5QiMhl1WnSFA68T9lkPlwIvI7r4/GpxknUFWSAbax6DoK5+V 0dkHdGmqYshtI70ARsZQy1XkL1Uz6d2OUkW+OlIBEn7oLwnUd+KnBzdblkruHfORjW5E Iu0V2qKNwb/C2A/MUa0DBP5Y9vSDPcI58r5Dbb9oxi/dQ6VDB3L+JjPayQFOBw7PiSyS 4tzA1V53AxaJDLYKooI9W0vEQy4xjGZy0t1UEj3EmTIjfhTfexILWQaQxyIF9rehfIam YSlQ== X-Gm-Message-State: AOJu0YykFvHRueSVR/AUOtGEhfEzT9FXq4u9ztX9h3f1KOey+83yHcFQ BSfBvTfPkLjcVcHT3LBcODyIoQ== X-Google-Smtp-Source: AGHT+IG5x81QIwdA146e8SSr+Pdh859h/oT2VMGTgxkFKS+ftvwwQnsNNroKYOvMgeiD+AUyeRhwsQ== X-Received: by 2002:a17:903:2347:b0:1d3:c730:f0a2 with SMTP id c7-20020a170903234700b001d3c730f0a2mr3728002plh.118.1703008025154; Tue, 19 Dec 2023 09:47:05 -0800 (PST) Received: from sunil-pc.Dlink ([106.51.188.200]) by smtp.gmail.com with ESMTPSA id n16-20020a170903111000b001d3320f6143sm14453015plh.269.2023.12.19.09.46.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Dec 2023 09:47:04 -0800 (PST) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org Cc: Catalin Marinas , Will Deacon , Paul Walmsley , Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Anup Patel , Thomas Gleixner , Bjorn Helgaas , Haibo Xu , Conor Dooley , Andrew Jones , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Marc Zyngier , Sunil V L Subject: [RFC PATCH v3 16/17] ACPI: RISC-V: Create PLIC platform device Date: Tue, 19 Dec 2023 23:15:25 +0530 Message-Id: <20231219174526.2235150-17-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231219174526.2235150-1-sunilvl@ventanamicro.com> References: <20231219174526.2235150-1-sunilvl@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Since PLIC needs to be a platform device, probe the MADT and create platform devices for each PLIC in the system. Signed-off-by: Sunil V L --- drivers/acpi/riscv/init.c | 1 + drivers/acpi/riscv/init.h | 1 + drivers/acpi/riscv/irq.c | 19 +++++++++++++++++++ 3 files changed, 21 insertions(+) diff --git a/drivers/acpi/riscv/init.c b/drivers/acpi/riscv/init.c index e7eff7ab1474..c6fd4097e8ae 100644 --- a/drivers/acpi/riscv/init.c +++ b/drivers/acpi/riscv/init.c @@ -11,4 +11,5 @@ void __init acpi_riscv_init(void) { riscv_acpi_aplic_platform_init(); + riscv_acpi_plic_platform_init(); } diff --git a/drivers/acpi/riscv/init.h b/drivers/acpi/riscv/init.h index 17bcf0baaadb..b4b305d83b3a 100644 --- a/drivers/acpi/riscv/init.h +++ b/drivers/acpi/riscv/init.h @@ -3,3 +3,4 @@ void __init riscv_acpi_imsic_platform_init(void); void __init riscv_acpi_aplic_platform_init(void); +void __init riscv_acpi_plic_platform_init(void); diff --git a/drivers/acpi/riscv/irq.c b/drivers/acpi/riscv/irq.c index d08a851ab6dc..f14ea43b0178 100644 --- a/drivers/acpi/riscv/irq.c +++ b/drivers/acpi/riscv/irq.c @@ -148,3 +148,22 @@ void __init riscv_acpi_aplic_platform_init(void) { acpi_table_parse_madt(ACPI_MADT_TYPE_APLIC, aplic_parse_madt, 0); } + +static int __init plic_parse_madt(union acpi_subtable_headers *header, + const unsigned long end) +{ + struct acpi_madt_plic *plic = (struct acpi_madt_plic *)header; + + return irqchip_add_platform_device("riscv-plic", + plic->id, + plic->base_addr, + plic->size, + plic->gsi_base, + plic->num_irqs, + header); +} + +void __init riscv_acpi_plic_platform_init(void) +{ + acpi_table_parse_madt(ACPI_MADT_TYPE_PLIC, plic_parse_madt, 0); +}