From patchwork Thu Mar 17 06:34:07 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 644 Return-Path: Delivered-To: unknown Received: from imap.gmail.com (74.125.159.109) by localhost6.localdomain6 with IMAP4-SSL; 08 Jun 2011 14:44:20 -0000 Delivered-To: patches@linaro.org Received: by 10.151.46.5 with SMTP id y5cs31061ybj; Wed, 16 Mar 2011 23:34:32 -0700 (PDT) Received: by 10.224.80.136 with SMTP id t8mr734890qak.373.1300343672252; Wed, 16 Mar 2011 23:34:32 -0700 (PDT) Received: from TX2EHSOBE003.bigfish.com (tx2ehsobe002.messaging.microsoft.com [65.55.88.12]) by mx.google.com with ESMTPS id t7si3449418qcp.150.2011.03.16.23.34.31 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 16 Mar 2011 23:34:32 -0700 (PDT) Received-SPF: neutral (google.com: 65.55.88.12 is neither permitted nor denied by best guess record for domain of R65037@freescale.com) client-ip=65.55.88.12; Authentication-Results: mx.google.com; spf=neutral (google.com: 65.55.88.12 is neither permitted nor denied by best guess record for domain of R65037@freescale.com) smtp.mail=R65037@freescale.com Received: from mail89-tx2-R.bigfish.com (10.9.14.245) by TX2EHSOBE003.bigfish.com (10.9.40.23) with Microsoft SMTP Server id 14.1.225.8; Thu, 17 Mar 2011 06:34:31 +0000 Received: from mail89-tx2 (localhost.localdomain [127.0.0.1]) by mail89-tx2-R.bigfish.com (Postfix) with ESMTP id ED0EB18D83ED; Thu, 17 Mar 2011 06:34:30 +0000 (UTC) X-SpamScore: -2 X-BigFish: VS-2(zzbb2cKzz1202hzz8275bh1497iz2dh2a8h668h62h) X-Spam-TCS-SCL: 1:0 X-Forefront-Antispam-Report: KIP:(null); UIP:(null); IPVD:NLI; H:mail.freescale.net; RD:none; EFVD:NLI Received: from mail89-tx2 (localhost.localdomain [127.0.0.1]) by mail89-tx2 (MessageSwitch) id 1300343670697750_10734; Thu, 17 Mar 2011 06:34:30 +0000 (UTC) Received: from TX2EHSMHS031.bigfish.com (unknown [10.9.14.241]) by mail89-tx2.bigfish.com (Postfix) with ESMTP id A4A46FF0052; Thu, 17 Mar 2011 06:34:30 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by TX2EHSMHS031.bigfish.com (10.9.99.131) with Microsoft SMTP Server (TLS) id 14.1.225.8; Thu, 17 Mar 2011 06:34:30 +0000 Received: from az33smr02.freescale.net (10.64.34.200) by 039-SN1MMR1-001.039d.mgd.msft.net (10.84.1.13) with Microsoft SMTP Server id 14.1.270.2; Thu, 17 Mar 2011 01:34:29 -0500 Received: from x-VirtualBox.ap.freescale.net (x-VirtualBox.ap.freescale.net [10.192.242.62]) by az33smr02.freescale.net (8.13.1/8.13.0) with ESMTP id p2H6YETd022638; Thu, 17 Mar 2011 01:34:26 -0500 (CDT) From: Richard Zhu To: CC: , , , , , , , , Richard Zhu , Richard Zhao Subject: [PATCH V6 4/4] mmc: sdhci-esdhc: enable esdhc on imx53 Date: Thu, 17 Mar 2011 14:34:07 +0800 Message-ID: <1300343647-15735-4-git-send-email-Hong-Xing.Zhu@freescale.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1300343647-15735-1-git-send-email-Hong-Xing.Zhu@freescale.com> References: <1300343647-15735-1-git-send-email-Hong-Xing.Zhu@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com Fix the NO INT in the Multi-BLK IO in SD/MMC, and Multi-BLK read in SDIO on imx53. The CMDTYPE of the CMD register (offset 0xE) should be set to "11" when the STOP CMD12 is issued on imx53 to abort one open ended multi-blk IO. Otherwise one the TC INT wouldn't be generated. In exact block transfer, the controller doesn't complete the operations automatically as required at the end of the transfer and remains on hold if the abort command is not sent on imx53. As a result, the TC flag is not asserted and SW received timeout exeception. set bit1 of Vendor Spec registor to fix it. Signed-off-by: Richard Zhu Signed-off-by: Richard Zhao --- drivers/mmc/host/sdhci-esdhc-imx.c | 42 ++++++++++++++++++++++++++++++++++++ 1 files changed, 42 insertions(+), 0 deletions(-) diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index 5768e06..96d131e 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -19,13 +19,31 @@ #include #include #include +#include +#include #include #include #include "sdhci.h" #include "sdhci-pltfm.h" #include "sdhci-esdhc.h" +/* VENDOR SPEC register */ +#define SDHCI_VENDOR_SPEC 0xC0 +#define SDHCI_VENDOR_SPEC_SDIO_QUIRK 0x00000002 + #define IMX_GPIO_CD_WP (1 << 0) +/* + * The CMDTYPE of the CMD register (offset 0xE) should be set to + * "11" when the STOP CMD12 is issued on imx53 to abort one + * open ended multi-blk IO. Otherwise the TC INT wouldn't + * be generated. + * In exact block transfer, the controller doesn't complete the + * operations automatically as required at the end of the + * transfer and remains on hold if the abort command is not sent. + * As a result, the TC flag is not asserted and SW received timeout + * exeception. Bit1 of Vendor Spec registor is used to fix it. + */ +#define IMX_MULTIBLK_NO_INT (1 << 1) struct pltfm_imx_data { int flags; @@ -80,6 +98,15 @@ static void esdhc_writel_le(struct sdhci_host *host, u32 val, int reg) */ val &= ~(SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT); + if (unlikely((imx_data->flags & IMX_MULTIBLK_NO_INT) + && (reg == SDHCI_INT_STATUS) + && (val & SDHCI_INT_DATA_END))) { + u32 v; + v = readl(host->ioaddr + SDHCI_VENDOR_SPEC); + v &= ~SDHCI_VENDOR_SPEC_SDIO_QUIRK; + writel(v, host->ioaddr + SDHCI_VENDOR_SPEC); + } + writel(val, host->ioaddr + reg); } @@ -103,9 +130,21 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg) * Postpone this write, we must do it together with a * command write that is down below. */ + if ((host->cmd->opcode == SD_IO_RW_EXTENDED) + && (host->cmd->data->blocks > 1) + && (host->cmd->data->flags & MMC_DATA_READ) + && (imx_data->flags & IMX_MULTIBLK_NO_INT)) { + u32 v; + v = readl(host->ioaddr + SDHCI_VENDOR_SPEC); + v |= SDHCI_VENDOR_SPEC_SDIO_QUIRK; + writel(v, host->ioaddr + SDHCI_VENDOR_SPEC); + } imx_data->mod_val = val; return; case SDHCI_COMMAND: + if ((host->cmd->opcode == MMC_STOP_TRANSMISSION) + && (imx_data->flags & IMX_MULTIBLK_NO_INT)) + val |= SDHCI_CMD_ABORTCMD; writel(val << 16 | imx_data->mod_val, host->ioaddr + SDHCI_TRANSFER_MODE); return; @@ -213,6 +252,9 @@ static int esdhc_pltfm_init(struct sdhci_host *host, struct sdhci_pltfm_data *pd sdhci_esdhc_ops.get_ro = esdhc_pltfm_get_ro; } + if (!(cpu_is_mx25() || cpu_is_mx35() || cpu_is_mx51())) + imx_data->flags |= IMX_MULTIBLK_NO_INT; + if (boarddata) { err = gpio_request_one(boarddata->wp_gpio, GPIOF_IN, "ESDHC_WP"); if (err) {