From patchwork Fri Mar 25 03:39:06 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 779 Return-Path: Delivered-To: unknown Received: from imap.gmail.com (74.125.159.109) by localhost6.localdomain6 with IMAP4-SSL; 08 Jun 2011 14:45:44 -0000 Delivered-To: patches@linaro.org Received: by 10.42.161.68 with SMTP id s4cs149848icx; Thu, 24 Mar 2011 20:39:26 -0700 (PDT) Received: by 10.224.211.65 with SMTP id gn1mr200388qab.355.1301024366043; Thu, 24 Mar 2011 20:39:26 -0700 (PDT) Received: from ch1outboundpool.messaging.microsoft.com (ch1outboundpool.messaging.microsoft.com [216.32.181.186]) by mx.google.com with ESMTPS id k5si1233401qcu.9.2011.03.24.20.39.25 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 24 Mar 2011 20:39:26 -0700 (PDT) Received-SPF: neutral (google.com: 216.32.181.186 is neither permitted nor denied by best guess record for domain of R65037@freescale.com) client-ip=216.32.181.186; Authentication-Results: mx.google.com; spf=neutral (google.com: 216.32.181.186 is neither permitted nor denied by best guess record for domain of R65037@freescale.com) smtp.mail=R65037@freescale.com Received: from mail169-ch1-R.bigfish.com (216.32.181.173) by CH1EHSOBE018.bigfish.com (10.43.70.68) with Microsoft SMTP Server id 14.1.225.8; Fri, 25 Mar 2011 03:39:25 +0000 Received: from mail169-ch1 (localhost.localdomain [127.0.0.1]) by mail169-ch1-R.bigfish.com (Postfix) with ESMTP id E3DBF12E8172; Fri, 25 Mar 2011 03:39:24 +0000 (UTC) X-SpamScore: -2 X-BigFish: VS-2(zzbb2cKzz1202hzz8275bh1497iz2dh2a8h668h61h) X-Spam-TCS-SCL: 0:0 X-Forefront-Antispam-Report: KIP:(null); UIP:(null); IPVD:NLI; H:mail.freescale.net; RD:none; EFVD:NLI Received: from mail169-ch1 (localhost.localdomain [127.0.0.1]) by mail169-ch1 (MessageSwitch) id 1301024364600033_21945; Fri, 25 Mar 2011 03:39:24 +0000 (UTC) Received: from CH1EHSMHS006.bigfish.com (snatpool1.int.messaging.microsoft.com [10.43.68.252]) by mail169-ch1.bigfish.com (Postfix) with ESMTP id 5CFE4167804D; Fri, 25 Mar 2011 03:39:24 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CH1EHSMHS006.bigfish.com (10.43.70.6) with Microsoft SMTP Server (TLS) id 14.1.225.22; Fri, 25 Mar 2011 03:39:23 +0000 Received: from az33smr02.freescale.net (10.64.34.200) by 039-SN1MMR1-001.039d.mgd.msft.net (10.84.1.13) with Microsoft SMTP Server id 14.1.270.2; Thu, 24 Mar 2011 22:39:23 -0500 Received: from x-VirtualBox.ap.freescale.net (x-VirtualBox.ap.freescale.net [10.192.242.62]) by az33smr02.freescale.net (8.13.1/8.13.0) with ESMTP id p2P3d8eb011179; Thu, 24 Mar 2011 22:39:20 -0500 (CDT) From: Richard Zhu To: CC: , , , , , , , , Richard Zhu , Richard Zhao Subject: [PATCH V8 4/4] mmc: sdhci-esdhc: enable esdhc on imx53 Date: Fri, 25 Mar 2011 11:39:06 +0800 Message-ID: <1301024346-2232-4-git-send-email-Hong-Xing.Zhu@freescale.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1301024346-2232-1-git-send-email-Hong-Xing.Zhu@freescale.com> References: <1301024346-2232-1-git-send-email-Hong-Xing.Zhu@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com Fix the NO INT in the Multi-BLK IO in SD/MMC, and Multi-BLK read in SDIO on imx53. The CMDTYPE of the CMD register (offset 0xE) should be set to "11" when the STOP CMD12 is issued on imx53 to abort one open ended multi-blk IO. Otherwise one the TC INT wouldn't be generated. In exact block transfer, the controller doesn't complete the operations automatically as required at the end of the transfer and remains on hold if the abort command is not sent on imx53. As a result, the TC flag is not asserted and SW received timeout exeception. set bit1 of Vendor Spec registor to fix it. Signed-off-by: Richard Zhu Signed-off-by: Richard Zhao --- drivers/mmc/host/sdhci-esdhc-imx.c | 42 ++++++++++++++++++++++++++++++++++++ 1 files changed, 42 insertions(+), 0 deletions(-) diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index 67a2da9..a19967d 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -19,13 +19,31 @@ #include #include #include +#include +#include #include #include #include "sdhci.h" #include "sdhci-pltfm.h" #include "sdhci-esdhc.h" +/* VENDOR SPEC register */ +#define SDHCI_VENDOR_SPEC 0xC0 +#define SDHCI_VENDOR_SPEC_SDIO_QUIRK 0x00000002 + #define ESDHC_FLAG_GPIO_FOR_CD_WP (1 << 0) +/* + * The CMDTYPE of the CMD register (offset 0xE) should be set to + * "11" when the STOP CMD12 is issued on imx53 to abort one + * open ended multi-blk IO. Otherwise the TC INT wouldn't + * be generated. + * In exact block transfer, the controller doesn't complete the + * operations automatically as required at the end of the + * transfer and remains on hold if the abort command is not sent. + * As a result, the TC flag is not asserted and SW received timeout + * exeception. Bit1 of Vendor Spec registor is used to fix it. + */ +#define ESDHC_FLAG_MULTIBLK_NO_INT (1 << 1) struct pltfm_imx_data { int flags; @@ -78,6 +96,15 @@ static void esdhc_writel_le(struct sdhci_host *host, u32 val, int reg) */ val &= ~(SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT); + if (unlikely((imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT) + && (reg == SDHCI_INT_STATUS) + && (val & SDHCI_INT_DATA_END))) { + u32 v; + v = readl(host->ioaddr + SDHCI_VENDOR_SPEC); + v &= ~SDHCI_VENDOR_SPEC_SDIO_QUIRK; + writel(v, host->ioaddr + SDHCI_VENDOR_SPEC); + } + writel(val, host->ioaddr + reg); } @@ -100,9 +127,21 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg) * Postpone this write, we must do it together with a * command write that is down below. */ + if ((imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT) + && (host->cmd->opcode == SD_IO_RW_EXTENDED) + && (host->cmd->data->blocks > 1) + && (host->cmd->data->flags & MMC_DATA_READ)) { + u32 v; + v = readl(host->ioaddr + SDHCI_VENDOR_SPEC); + v |= SDHCI_VENDOR_SPEC_SDIO_QUIRK; + writel(v, host->ioaddr + SDHCI_VENDOR_SPEC); + } imx_data->scratchpad = val; return; case SDHCI_COMMAND: + if ((host->cmd->opcode == MMC_STOP_TRANSMISSION) + && (imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT)) + val |= SDHCI_CMD_ABORTCMD; writel(val << 16 | imx_data->scratchpad, host->ioaddr + SDHCI_TRANSFER_MODE); return; @@ -215,6 +254,9 @@ static int esdhc_pltfm_init(struct sdhci_host *host, struct sdhci_pltfm_data *pd sdhci_esdhc_ops.get_ro = esdhc_pltfm_get_ro; } + if (!(cpu_is_mx25() || cpu_is_mx35() || cpu_is_mx51())) + imx_data->flags |= ESDHC_FLAG_MULTIBLK_NO_INT; + if (boarddata) { err = gpio_request_one(boarddata->wp_gpio, GPIOF_IN, "ESDHC_WP"); if (err) {