From patchwork Mon Oct 17 06:15:06 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 4696 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 4B8E623E51 for ; Mon, 17 Oct 2011 06:11:27 +0000 (UTC) Received: from mail-bw0-f52.google.com (mail-bw0-f52.google.com [209.85.214.52]) by fiordland.canonical.com (Postfix) with ESMTP id 3486BA1844E for ; Mon, 17 Oct 2011 06:11:27 +0000 (UTC) Received: by mail-bw0-f52.google.com with SMTP id zs2so6756792bkb.11 for ; Sun, 16 Oct 2011 23:11:27 -0700 (PDT) Received: by 10.223.17.3 with SMTP id q3mr22474112faa.28.1318831886698; Sun, 16 Oct 2011 23:11:26 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.152.24.41 with SMTP id r9cs89278laf; Sun, 16 Oct 2011 23:11:26 -0700 (PDT) Received: by 10.68.17.165 with SMTP id p5mr3921162pbd.93.1318831885190; Sun, 16 Oct 2011 23:11:25 -0700 (PDT) Received: from mail-pz0-f42.google.com (mail-pz0-f42.google.com [209.85.210.42]) by mx.google.com with ESMTPS id y9si14478755pbi.19.2011.10.16.23.11.24 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 16 Oct 2011 23:11:25 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.210.42 is neither permitted nor denied by best guess record for domain of shawn.guo@linaro.org) client-ip=209.85.210.42; Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.210.42 is neither permitted nor denied by best guess record for domain of shawn.guo@linaro.org) smtp.mail=shawn.guo@linaro.org Received: by mail-pz0-f42.google.com with SMTP id 36so4653580pzk.1 for ; Sun, 16 Oct 2011 23:11:24 -0700 (PDT) Received: by 10.68.14.97 with SMTP id o1mr36703293pbc.0.1318831884145; Sun, 16 Oct 2011 23:11:24 -0700 (PDT) Received: from localhost.localdomain ([117.82.23.149]) by mx.google.com with ESMTPS id ko15sm21528378pbb.9.2011.10.16.23.11.18 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 16 Oct 2011 23:11:23 -0700 (PDT) From: Shawn Guo To: Arnd Bergmann , Chris Ball Cc: linux-arm-kernel@lists.infradead.org, linux-mmc@vger.kernel.org, Sascha Hauer , patches@linaro.org, Shawn Guo Subject: [PATCH 1/5] arm/imx: remove mx31_setup_weimcs() from mx31.h Date: Mon, 17 Oct 2011 14:15:06 +0800 Message-Id: <1318832110-29289-2-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1318832110-29289-1-git-send-email-shawn.guo@linaro.org> References: <1318832110-29289-1-git-send-email-shawn.guo@linaro.org> MIME-Version: 1.0 The helper function mx31_setup_weimcs() references IOMEM() and IMX_IO_P2V() but without required header mach/hardware.h included in mx31.h. This will break the build of those mx31 based board file with no direct inclusion of mach/hardware.h, or when indirect inclusion to mach/hardware.h breaks. For example, when the inclusion of mach/hardware.h gets removed from mach/gpio.h, we will see the following compile error. CC arch/arm/mach-imx/mach-pcm037_eet.o In file included from arch/arm/mach-imx/devices-imx31.h:9:0, from arch/arm/mach-imx/mach-pcm037_eet.c:20: arch/arm/plat-mxc/include/mach/mx31.h: In function ‘mx31_setup_weimcs’: arch/arm/plat-mxc/include/mach/mx31.h:129:2: error: implicit declaration of function ‘IOMEM’ arch/arm/plat-mxc/include/mach/mx31.h:129:2: error: implicit declaration of function ‘IMX_IO_P2V’ This patch removes mx31_setup_weimcs() from mx31.h and makes it local to mach-qong.c, which is the only user for this helper. Signed-off-by: Shawn Guo --- arch/arm/mach-imx/mach-qong.c | 5 ++++- arch/arm/plat-mxc/include/mach/mx31.h | 14 -------------- 2 files changed, 4 insertions(+), 15 deletions(-) diff --git a/arch/arm/mach-imx/mach-qong.c b/arch/arm/mach-imx/mach-qong.c index 1c4822b..4ff5faf 100644 --- a/arch/arm/mach-imx/mach-qong.c +++ b/arch/arm/mach-imx/mach-qong.c @@ -190,7 +190,10 @@ static struct platform_device qong_nand_device = { static void __init qong_init_nand_mtd(void) { /* init CS */ - mx31_setup_weimcs(3, 0x00004f00, 0x20013b31, 0x00020800); + __raw_writel(0x00004f00, MX31_IO_ADDRESS(MX31_WEIM_CSCRxU(3))); + __raw_writel(0x20013b31, MX31_IO_ADDRESS(MX31_WEIM_CSCRxL(3))); + __raw_writel(0x00020800, MX31_IO_ADDRESS(MX31_WEIM_CSCRxA(3))); + mxc_iomux_set_gpr(MUX_SDCTL_CSD1_SEL, true); /* enable pin */ diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h index 79e7fc0..e27619e 100644 --- a/arch/arm/plat-mxc/include/mach/mx31.h +++ b/arch/arm/plat-mxc/include/mach/mx31.h @@ -1,10 +1,6 @@ #ifndef __MACH_MX31_H__ #define __MACH_MX31_H__ -#ifndef __ASSEMBLER__ -#include -#endif - /* * IRAM */ @@ -122,16 +118,6 @@ #define MX31_IO_P2V(x) IMX_IO_P2V(x) #define MX31_IO_ADDRESS(x) IOMEM(MX31_IO_P2V(x)) -#ifndef __ASSEMBLER__ -static inline void mx31_setup_weimcs(size_t cs, - unsigned upper, unsigned lower, unsigned addional) -{ - __raw_writel(upper, MX31_IO_ADDRESS(MX31_WEIM_CSCRxU(cs))); - __raw_writel(lower, MX31_IO_ADDRESS(MX31_WEIM_CSCRxL(cs))); - __raw_writel(addional, MX31_IO_ADDRESS(MX31_WEIM_CSCRxA(cs))); -} -#endif - #define MX31_INT_I2C3 3 #define MX31_INT_I2C2 4 #define MX31_INT_MPEG4_ENCODER 5