From patchwork Fri Dec 16 16:35:32 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Martin X-Patchwork-Id: 5827 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 06AD823E01 for ; Fri, 16 Dec 2011 16:35:54 +0000 (UTC) Received: from mail-ey0-f180.google.com (mail-ey0-f180.google.com [209.85.215.180]) by fiordland.canonical.com (Postfix) with ESMTP id F1171A189C9 for ; Fri, 16 Dec 2011 16:35:53 +0000 (UTC) Received: by mail-ey0-f180.google.com with SMTP id k10so3835963eaa.11 for ; Fri, 16 Dec 2011 08:35:53 -0800 (PST) Received: by 10.205.127.12 with SMTP id gy12mr3205049bkc.108.1324053352016; Fri, 16 Dec 2011 08:35:52 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.204.41.207 with SMTP id p15cs10392bke; Fri, 16 Dec 2011 08:35:51 -0800 (PST) Received: by 10.180.84.202 with SMTP id b10mr13932674wiz.10.1324053348775; Fri, 16 Dec 2011 08:35:48 -0800 (PST) Received: from mail-ww0-f50.google.com (mail-ww0-f50.google.com [74.125.82.50]) by mx.google.com with ESMTPS id e1si6414778wbh.82.2011.12.16.08.35.48 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 16 Dec 2011 08:35:48 -0800 (PST) Received-SPF: neutral (google.com: 74.125.82.50 is neither permitted nor denied by best guess record for domain of dave.martin@linaro.org) client-ip=74.125.82.50; Authentication-Results: mx.google.com; spf=neutral (google.com: 74.125.82.50 is neither permitted nor denied by best guess record for domain of dave.martin@linaro.org) smtp.mail=dave.martin@linaro.org Received: by mail-ww0-f50.google.com with SMTP id dr11so6380840wgb.31 for ; Fri, 16 Dec 2011 08:35:48 -0800 (PST) Received: by 10.180.18.233 with SMTP id z9mr13646718wid.0.1324053348283; Fri, 16 Dec 2011 08:35:48 -0800 (PST) Received: from e103592.peterhouse.linaro.org (fw-lnat.cambridge.arm.com. [217.140.96.63]) by mx.google.com with ESMTPS id p2sm15137647wbh.22.2011.12.16.08.35.46 (version=SSLv3 cipher=OTHER); Fri, 16 Dec 2011 08:35:47 -0800 (PST) From: Dave Martin To: linux-arm-kernel@lists.infradead.org Cc: patches@linaro.org, =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Fabio Estevam , Sascha Hauer , Shawn Guo Subject: [PATCH v5 REPOST 5/5] imx6q: Remove unconditional dependency on l2x0 L2 cache support Date: Fri, 16 Dec 2011 16:35:32 +0000 Message-Id: <1324053332-6431-6-git-send-email-dave.martin@linaro.org> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1324053332-6431-1-git-send-email-dave.martin@linaro.org> References: <1324053332-6431-1-git-send-email-dave.martin@linaro.org> The i.MX6 Quad SoC will work without the l2x0 L2 cache controller support built into the kernel, so this patch removes the dependency on CACHE_L2X0. This makes the l2x0 support optional, so that it can be turned off when desired for debugging purposes etc. Since SOC_IMX6Q already depends on ARCH_IMX_V6_V7 and ARCH_IMX_V6_V7 selects MIGHT_HAVE_CACHE_L2X0, there is no need to select that option explicitly from SOC_IMX6Q. Thanks to Shawn Guo for this suggestion. [1] [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2011-November/074602.html Signed-off-by: Dave Martin Acked-by: Shawn Guo Tested-by: Shawn Guo Acked-by: Sascha Hauer --- arch/arm/mach-imx/Kconfig | 1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 29a3d61..1530678 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -609,7 +609,6 @@ comment "i.MX6 family:" config SOC_IMX6Q bool "i.MX6 Quad support" select ARM_GIC - select CACHE_L2X0 select CPU_V7 select HAVE_ARM_SCU select HAVE_IMX_GPC