From patchwork Wed Feb 29 03:11:44 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob X-Patchwork-Id: 6987 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 7C39423EAF for ; Wed, 29 Feb 2012 03:12:10 +0000 (UTC) Received: from mail-iy0-f180.google.com (mail-iy0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id 3F007A18089 for ; Wed, 29 Feb 2012 03:12:10 +0000 (UTC) Received: by mail-iy0-f180.google.com with SMTP id e36so2503688iag.11 for ; Tue, 28 Feb 2012 19:12:10 -0800 (PST) Received: from mr.google.com ([10.50.207.72]) by 10.50.207.72 with SMTP id lu8mr25304006igc.0.1330485130097 (num_hops = 1); Tue, 28 Feb 2012 19:12:10 -0800 (PST) Received: by 10.50.207.72 with SMTP id lu8mr20513413igc.0.1330485130053; Tue, 28 Feb 2012 19:12:10 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.11.10 with SMTP id r10csp23422ibr; Tue, 28 Feb 2012 19:12:09 -0800 (PST) Received: by 10.236.115.105 with SMTP id d69mr17370818yhh.89.1330485129250; Tue, 28 Feb 2012 19:12:09 -0800 (PST) Received: from mail-gx0-f178.google.com (mail-gx0-f178.google.com [209.85.161.178]) by mx.google.com with ESMTPS id l67si22475634yhm.116.2012.02.28.19.12.09 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 28 Feb 2012 19:12:09 -0800 (PST) Received-SPF: neutral (google.com: 209.85.161.178 is neither permitted nor denied by best guess record for domain of rob.lee@linaro.org) client-ip=209.85.161.178; Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.161.178 is neither permitted nor denied by best guess record for domain of rob.lee@linaro.org) smtp.mail=rob.lee@linaro.org Received: by mail-gx0-f178.google.com with SMTP id o1so630033ggn.37 for ; Tue, 28 Feb 2012 19:12:09 -0800 (PST) Received-SPF: pass (google.com: domain of rob.lee@linaro.org designates 10.236.153.70 as permitted sender) client-ip=10.236.153.70; Received: from mr.google.com ([10.236.153.70]) by 10.236.153.70 with SMTP id e46mr32105258yhk.29.1330485129099 (num_hops = 1); Tue, 28 Feb 2012 19:12:09 -0800 (PST) MIME-Version: 1.0 Received: by 10.236.153.70 with SMTP id e46mr24396984yhk.29.1330485126506; Tue, 28 Feb 2012 19:12:06 -0800 (PST) Received: from b18647-20 ([216.59.3.73]) by mx.google.com with ESMTPS id j2sm32232637ani.19.2012.02.28.19.12.03 (version=SSLv3 cipher=OTHER); Tue, 28 Feb 2012 19:12:05 -0800 (PST) From: Robert Lee To: len.brown@intel.com, khilman@ti.com Cc: robherring2@gmail.com, Baohua.Song@csr.com, amit.kucheria@linaro.org, nicolas.ferre@atmel.com, linux@maxim.org.za, kgene.kim@samsung.com, amit.kachhap@linaro.org, magnus.damm@gmail.com, nsekhar@ti.com, daniel.lezcano@linaro.org, mturquette@linaro.org, vincent.guittot@linaro.org, arnd.bergmann@linaro.org, linux-arm-kernel@lists.infradead.org, linaro-dev@lists.linaro.org, patches@linaro.org, deepthi@linux.vnet.ibm.com, broonie@opensource.wolfsonmicro.com, nicolas.pitre@linaro.org, linux@arm.linux.org.uk, jean.pihet@newoldbits.com, venki@google.com, ccross@google.com, g.trinabh@gmail.com, kernel@wantstofly.org, lethal@linux-sh.org, jon-hunter@ti.com, tony@atomide.com, linux-omap@vger.kernel.org, linux-sh@vger.kernel.org, linux-pm@vger.kernel.org Subject: [PATCH v6 4/9] ARM: kirkwood: Consolidate time keeping and irq enable Date: Tue, 28 Feb 2012 21:11:44 -0600 Message-Id: <1330485109-7327-5-git-send-email-rob.lee@linaro.org> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1330485109-7327-1-git-send-email-rob.lee@linaro.org> References: <1330485109-7327-1-git-send-email-rob.lee@linaro.org> X-Gm-Message-State: ALoCoQlretMFwZshOcN6lY51HE6eLjEeWlNh8ZI86E+zFaKYEUiuLupgWKo7nMjlTWRX6nyfepwh Enable core cpuidle timekeeping and irq enabling and remove that handling from this code. Signed-off-by: Robert Lee --- arch/arm/mach-kirkwood/cpuidle.c | 72 +++++++++++--------------------------- 1 files changed, 21 insertions(+), 51 deletions(-) diff --git a/arch/arm/mach-kirkwood/cpuidle.c b/arch/arm/mach-kirkwood/cpuidle.c index 7088180..7fd1f88 100644 --- a/arch/arm/mach-kirkwood/cpuidle.c +++ b/arch/arm/mach-kirkwood/cpuidle.c @@ -20,77 +20,47 @@ #include #include #include +#include #include #define KIRKWOOD_MAX_STATES 2 -static struct cpuidle_driver kirkwood_idle_driver = { - .name = "kirkwood_idle", - .owner = THIS_MODULE, -}; - -static DEFINE_PER_CPU(struct cpuidle_device, kirkwood_cpuidle_device); - /* Actual code that puts the SoC in different idle states */ static int kirkwood_enter_idle(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) { - struct timeval before, after; - int idle_time; - - local_irq_disable(); - do_gettimeofday(&before); - if (index == 0) - /* Wait for interrupt state */ - cpu_do_idle(); - else if (index == 1) { - /* - * Following write will put DDR in self refresh. - * Note that we have 256 cycles before DDR puts it - * self in self-refresh, so the wait-for-interrupt - * call afterwards won't get the DDR from self refresh - * mode. - */ - writel(0x7, DDR_OPERATION_BASE); - cpu_do_idle(); - } - do_gettimeofday(&after); - local_irq_enable(); - idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC + - (after.tv_usec - before.tv_usec); - - /* Update last residency */ - dev->last_residency = idle_time; + writel(0x7, DDR_OPERATION_BASE); + cpu_do_idle(); return index; } +static struct cpuidle_driver kirkwood_idle_driver = { + .name = "kirkwood_idle", + .owner = THIS_MODULE, + .en_core_tk_irqen = 1, + .states[0] = CPUIDLE_ARM_WFI_STATE, + .states[1] = { + .enter = kirkwood_enter_idle, + .exit_latency = 10, + .target_residency = 100000, + .flags = CPUIDLE_FLAG_TIME_VALID, + .name = "DDR SR", + .desc = "WFI and DDR Self Refresh", + }, + .state_count = KIRKWOOD_MAX_STATES, +}; + +static DEFINE_PER_CPU(struct cpuidle_device, kirkwood_cpuidle_device); + /* Initialize CPU idle by registering the idle states */ static int kirkwood_init_cpuidle(void) { struct cpuidle_device *device; - struct cpuidle_driver *driver = &kirkwood_idle_driver; device = &per_cpu(kirkwood_cpuidle_device, smp_processor_id()); device->state_count = KIRKWOOD_MAX_STATES; - driver->state_count = KIRKWOOD_MAX_STATES; - - /* Wait for interrupt state */ - driver->states[0].enter = kirkwood_enter_idle; - driver->states[0].exit_latency = 1; - driver->states[0].target_residency = 10000; - driver->states[0].flags = CPUIDLE_FLAG_TIME_VALID; - strcpy(driver->states[0].name, "WFI"); - strcpy(driver->states[0].desc, "Wait for interrupt"); - - /* Wait for interrupt and DDR self refresh state */ - driver->states[1].enter = kirkwood_enter_idle; - driver->states[1].exit_latency = 10; - driver->states[1].target_residency = 10000; - driver->states[1].flags = CPUIDLE_FLAG_TIME_VALID; - strcpy(driver->states[1].name, "DDR SR"); - strcpy(driver->states[1].desc, "WFI and DDR Self Refresh"); cpuidle_register_driver(&kirkwood_idle_driver); if (cpuidle_register_device(device)) {