From patchwork Wed Mar 14 08:22:58 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhao X-Patchwork-Id: 7276 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 57DC223E0E for ; Wed, 14 Mar 2012 08:23:15 +0000 (UTC) Received: from mail-iy0-f180.google.com (mail-iy0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id BF8D4A186F0 for ; Wed, 14 Mar 2012 08:23:14 +0000 (UTC) Received: by iage36 with SMTP id e36so2733695iag.11 for ; Wed, 14 Mar 2012 01:23:14 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf :x-spamscore:x-bigfish:x-forefront-antispam-report :x-fb-domain-ip-match:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:mime-version:content-type:x-originatororg :x-gm-message-state; bh=zffklvgPedxWK/4H0Qeyo1du1nbw5XDtJFWTrBhBVdU=; b=i0O6jCnsSWeIYDNgXD6s1YTyeAThlhfIo13MlOGvdt0aZEqxvNAJHavR7483AO7SOw 6FtffJ6mfBfrjCmtJVxMv/2E1HGy+O9KCH5W4c1TDm9B0KHORjDEWpOflY6Sru6XzVnP z8tp2XKrqbsufbWgiq9w4Omq5A86x02OTu1/kDvu3pTMSH3vqFDxXGDKcoA1aA7Pfsa5 5mm/uzx6mdyocE2w2A6pAxB0SlAFn7lRuBTUHFSVyEeafBUUrBdTrdJ6n4ZakqZ88qh1 5jR0Tbffom2mACpUE0+TPn4J606BPDI8DDXcTtbO+oVYfmiheqKy2WBPtntVFMHdSBn/ Xq5w== Received: by 10.50.183.137 with SMTP id em9mr9935560igc.58.1331713394134; Wed, 14 Mar 2012 01:23:14 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.53.18 with SMTP id k18csp4318ibg; Wed, 14 Mar 2012 01:23:13 -0700 (PDT) Received: by 10.50.37.236 with SMTP id b12mr2949499igk.36.1331713393020; Wed, 14 Mar 2012 01:23:13 -0700 (PDT) Received: from va3outboundpool.messaging.microsoft.com (va3ehsobe010.messaging.microsoft.com. [216.32.180.30]) by mx.google.com with ESMTPS id pp3si20596812igb.28.2012.03.14.01.23.12 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 14 Mar 2012 01:23:13 -0700 (PDT) Received-SPF: neutral (google.com: 216.32.180.30 is neither permitted nor denied by best guess record for domain of richard.zhao@linaro.org) client-ip=216.32.180.30; Authentication-Results: mx.google.com; spf=neutral (google.com: 216.32.180.30 is neither permitted nor denied by best guess record for domain of richard.zhao@linaro.org) smtp.mail=richard.zhao@linaro.org Received: from mail120-va3-R.bigfish.com (10.7.14.242) by VA3EHSOBE009.bigfish.com (10.7.40.29) with Microsoft SMTP Server id 14.1.225.23; Wed, 14 Mar 2012 08:23:13 +0000 Received: from mail120-va3 (localhost [127.0.0.1]) by mail120-va3-R.bigfish.com (Postfix) with ESMTP id DC7863802C4; Wed, 14 Mar 2012 08:23:13 +0000 (UTC) X-SpamScore: 3 X-BigFish: VS3(zcb8kzzz1202hzz8275dhz2dh87h2a8h668h839hd24h) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-FB-DOMAIN-IP-MATCH: fail Received: from mail120-va3 (localhost.localdomain [127.0.0.1]) by mail120-va3 (MessageSwitch) id 1331713391196837_28692; Wed, 14 Mar 2012 08:23:11 +0000 (UTC) Received: from VA3EHSMHS024.bigfish.com (unknown [10.7.14.249]) by mail120-va3.bigfish.com (Postfix) with ESMTP id 2A6054C006F; Wed, 14 Mar 2012 08:23:11 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by VA3EHSMHS024.bigfish.com (10.7.99.34) with Microsoft SMTP Server (TLS) id 14.1.225.23; Wed, 14 Mar 2012 08:23:10 +0000 Received: from az33smr01.freescale.net (10.64.34.199) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server id 14.1.355.3; Wed, 14 Mar 2012 03:23:07 -0500 Received: from b20223-02.ap.freescale.net (b20223-02.ap.freescale.net [10.192.242.124]) by az33smr01.freescale.net (8.13.1/8.13.0) with ESMTP id q2E8N3sP005356; Wed, 14 Mar 2012 03:23:05 -0500 (CDT) From: Richard Zhao To: CC: , , , Richard Zhao Subject: [PATCH 1/2] ARM: imx6q: add pll round_rate support Date: Wed, 14 Mar 2012 16:22:58 +0800 Message-ID: <1331713379-8437-2-git-send-email-richard.zhao@linaro.org> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1331713379-8437-1-git-send-email-richard.zhao@linaro.org> References: <1331713379-8437-1-git-send-email-richard.zhao@linaro.org> MIME-Version: 1.0 X-OriginatorOrg: sigmatel.com X-Gm-Message-State: ALoCoQlW6mBDaPsHQN4AS+9bSIuPgfqF3usVnlh+i+tbS2jDIrFNpRi72/xbZM7J3bOIW44Dioea Signed-off-by: Richard Zhao --- arch/arm/mach-imx/clock-imx6q.c | 85 +++++++++++++++++++++++++++++++++----- 1 files changed, 73 insertions(+), 12 deletions(-) diff --git a/arch/arm/mach-imx/clock-imx6q.c b/arch/arm/mach-imx/clock-imx6q.c index e4e4f5e..3d5dc56 100644 --- a/arch/arm/mach-imx/clock-imx6q.c +++ b/arch/arm/mach-imx/clock-imx6q.c @@ -519,6 +519,18 @@ static int pll1_sys_set_rate(struct clk *clk, unsigned long rate) return 0; } +static unsigned long pll1_sys_round_rate(struct clk *clk, unsigned long rate) +{ + u32 div; + unsigned long parent_rate = clk_get_rate(clk->parent); + + rate = rate < FREQ_650M ? FREQ_650M : rate; + rate = rate > FREQ_1300M ? FREQ_1300M : rate; + + div = rate * 2 / parent_rate; + return parent_rate * div / 2; +} + static unsigned long pll8_enet_get_rate(struct clk *clk) { u32 div = (readl_relaxed(PLL8_ENET) & BM_PLL_ENET_DIV_SELECT) >> @@ -567,6 +579,20 @@ static int pll8_enet_set_rate(struct clk *clk, unsigned long rate) return 0; } +static unsigned long pll8_enet_round_rate(struct clk *clk, unsigned long rate) +{ + if (rate >= 125000000) + rate = 125000000; + else if (rate >= 100000000) + rate = 100000000; + else if (rate >= 50000000) + rate = 50000000; + else + rate = 25000000; + return rate; +} + + static unsigned long pll_av_get_rate(struct clk *clk) { void __iomem *reg = (clk == &pll4_audio) ? PLL4_AUDIO : PLL5_VIDEO; @@ -606,6 +632,25 @@ static int pll_av_set_rate(struct clk *clk, unsigned long rate) return 0; } +static unsigned long pll_av_round_rate(struct clk *clk, unsigned long rate) +{ + unsigned long parent_rate = clk_get_rate(clk->parent); + u32 div; + u32 mfn, mfd = 1000000; + s64 temp64; + + rate = rate < FREQ_650M ? FREQ_650M : rate; + rate = rate > FREQ_1300M ? FREQ_1300M : rate; + + div = rate / parent_rate; + temp64 = (u64) (parent_rate - (div * parent_rate)); + temp64 *= mfd; + do_div(temp64, parent_rate); + mfn = temp64; + + return (parent_rate * div) + ((parent_rate / mfd) * mfn); +} + static void __iomem *pll_get_div_reg_bit(struct clk *clk, u32 *bp, u32 *bm) { void __iomem *reg; @@ -662,18 +707,33 @@ static int pll_set_rate(struct clk *clk, unsigned long rate) return 0; } -#define pll2_bus_get_rate pll_get_rate -#define pll2_bus_set_rate pll_set_rate -#define pll3_usb_otg_get_rate pll_get_rate -#define pll3_usb_otg_set_rate pll_set_rate -#define pll7_usb_host_get_rate pll_get_rate -#define pll7_usb_host_set_rate pll_set_rate -#define pll4_audio_get_rate pll_av_get_rate -#define pll4_audio_set_rate pll_av_set_rate -#define pll5_video_get_rate pll_av_get_rate -#define pll5_video_set_rate pll_av_set_rate -#define pll6_mlb_get_rate NULL -#define pll6_mlb_set_rate NULL +static unsigned long pll_round_rate(struct clk *clk, unsigned long rate) +{ + if (rate >= FREQ_528M) + rate = FREQ_528M; + else + rate = FREQ_480M; + return rate; +} + +#define pll2_bus_get_rate pll_get_rate +#define pll2_bus_set_rate pll_set_rate +#define pll2_bus_round_rate pll_round_rate +#define pll3_usb_otg_get_rate pll_get_rate +#define pll3_usb_otg_set_rate pll_set_rate +#define pll3_usb_otg_round_rate pll_round_rate +#define pll7_usb_host_get_rate pll_get_rate +#define pll7_usb_host_set_rate pll_set_rate +#define pll7_usb_host_round_rate pll_round_rate +#define pll4_audio_get_rate pll_av_get_rate +#define pll4_audio_set_rate pll_av_set_rate +#define pll4_audio_round_rate pll_av_round_rate +#define pll5_video_get_rate pll_av_get_rate +#define pll5_video_set_rate pll_av_set_rate +#define pll5_video_round_rate pll_av_round_rate +#define pll6_mlb_get_rate NULL +#define pll6_mlb_set_rate NULL +#define pll6_mlb_round_rate NULL #define DEF_PLL(name) \ static struct clk name = { \ @@ -681,6 +741,7 @@ static int pll_set_rate(struct clk *clk, unsigned long rate) .disable = pll_disable, \ .get_rate = name##_get_rate, \ .set_rate = name##_set_rate, \ + .round_rate = name##_round_rate, \ .parent = &osc_clk, \ }