From patchwork Mon May 7 21:16:46 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob X-Patchwork-Id: 8435 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 2C78423E49 for ; Mon, 7 May 2012 21:17:02 +0000 (UTC) Received: from mail-yw0-f52.google.com (mail-yw0-f52.google.com [209.85.213.52]) by fiordland.canonical.com (Postfix) with ESMTP id EFAB5A18803 for ; Mon, 7 May 2012 21:17:01 +0000 (UTC) Received: by yhpp61 with SMTP id p61so647749yhp.11 for ; Mon, 07 May 2012 14:17:01 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=43vZoX4c10hrqdEt8LgRrLe1mjxBQdvAFyl24I0+dDg=; b=X1XyDqV15OpwxS2fsLAUktcnPuG4bZ5hi1KH8ryLEivo8nhDuy5KCOf8R/ZF8NONO5 EVeP3cGz9+MpgBPyu0KlLDwCXLrpWcqYJeez+Ub9jFQtO0K1Ps+gE+a1exj6REgr0bQC tI2vYn6gCZkH9bmVGjefRNAOu70RHg481dZjS6xNaey8lX+meyD+fNC9O+bOOIEw5rWe 4S3Hys4s1qAUrRL4NThxPlbCHPRW6S86lY0Ri3+kg2PPBFyPON0EMldCk9nA6bYt/pKq CSPzxDhFe4BvC3kCVgMwLGRYomZYrG9tXxSGINFUrLVs+MQckkIqAiMPoBImLbWoiz4G J+fA== Received: by 10.50.220.136 with SMTP id pw8mr9524008igc.1.1336425421216; Mon, 07 May 2012 14:17:01 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.73.147 with SMTP id q19csp154767ibj; Mon, 7 May 2012 14:17:00 -0700 (PDT) Received: by 10.236.161.42 with SMTP id v30mr20770109yhk.127.1336425420181; Mon, 07 May 2012 14:17:00 -0700 (PDT) Received: from mail-yw0-f50.google.com (mail-yw0-f50.google.com [209.85.213.50]) by mx.google.com with ESMTPS id d67si15515355yhh.89.2012.05.07.14.17.00 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 07 May 2012 14:17:00 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.213.50 is neither permitted nor denied by best guess record for domain of rob.lee@linaro.org) client-ip=209.85.213.50; Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.213.50 is neither permitted nor denied by best guess record for domain of rob.lee@linaro.org) smtp.mail=rob.lee@linaro.org Received: by mail-yw0-f50.google.com with SMTP id j63so1022063yhj.37 for ; Mon, 07 May 2012 14:17:00 -0700 (PDT) Received: by 10.50.219.170 with SMTP id pp10mr9075015igc.25.1336425419667; Mon, 07 May 2012 14:16:59 -0700 (PDT) Received: from localhost.localdomain ([216.59.27.36]) by mx.google.com with ESMTPS id kn9sm6940883igc.8.2012.05.07.14.16.55 (version=SSLv3 cipher=OTHER); Mon, 07 May 2012 14:16:58 -0700 (PDT) From: Robert Lee To: kernel@pengutronix.de Cc: shawn.guo@linaro.org, amit.kucheria@linaro.org, daniel.lezcano@linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linaro-dev@lists.linaro.org, patches@linaro.org, jj@chaosbits.net Subject: [PATCH v3 2/3] ARM: imx: Add imx5 cpuidle driver Date: Mon, 7 May 2012 16:16:46 -0500 Message-Id: <1336425407-20308-3-git-send-email-rob.lee@linaro.org> X-Mailer: git-send-email 1.7.10 In-Reply-To: <1336425407-20308-1-git-send-email-rob.lee@linaro.org> References: <1336425407-20308-1-git-send-email-rob.lee@linaro.org> X-Gm-Message-State: ALoCoQnehQSqSYIOtMMUdNYT5ee9nlghGgvMO9/z+Q4ZVkqlH4AA8ElNGF7m4O8Ce/nOD7B4xfjw Add imx5 cpuidle driver. Signed-off-by: Robert Lee --- arch/arm/mach-imx/mm-imx5.c | 42 +++++++++++++++++++++++++++++++++++++++--- 1 file changed, 39 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c index d6b7e9f..0b3a4cc 100644 --- a/arch/arm/mach-imx/mm-imx5.c +++ b/arch/arm/mach-imx/mm-imx5.c @@ -20,26 +20,61 @@ #include #include +#include #include #include static struct clk *gpc_dvfs_clk; -static void imx5_idle(void) +static int imx5_idle(void) { + int ret = 0; + /* gpc clock is needed for SRPG */ if (gpc_dvfs_clk == NULL) { gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs"); if (IS_ERR(gpc_dvfs_clk)) - return; + return -ENODEV; } clk_enable(gpc_dvfs_clk); mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); if (!tzic_enable_wake()) cpu_do_idle(); + else + ret = -EBUSY; clk_disable(gpc_dvfs_clk); + + return ret; +} + +static int imx5_cpuidle_enter(struct cpuidle_device *dev, + struct cpuidle_driver *drv, int idx) +{ + int ret; + + ret = imx5_idle(); + + if (ret < 0) + return ret; + + return idx; } +static struct cpuidle_driver imx5_cpuidle_driver = { + .name = "imx5_cpuidle", + .owner = THIS_MODULE, + .en_core_tk_irqen = 1, + .states[0] = { + .enter = imx5_cpuidle_enter, + .exit_latency = 20, /* max latency at 160MHz */ + .target_residency = 1, + .flags = CPUIDLE_FLAG_TIME_VALID, + .name = "IMX5 SRPG", + .desc = "CPU state retained,powered off", + }, + .state_count = 1, +}; + /* * Define the MX50 memory map. */ @@ -103,7 +138,7 @@ void __init imx51_init_early(void) mxc_set_cpu_type(MXC_CPU_MX51); mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR)); - arm_pm_idle = imx5_idle; + arm_pm_idle = (void (*)(void))imx5_idle; } void __init imx53_init_early(void) @@ -238,4 +273,5 @@ void __init imx53_soc_init(void) void __init imx51_init_late(void) { mx51_neon_fixup(); + imx_cpuidle_init(&imx5_cpuidle_driver); }