From patchwork Tue Jun 19 08:28:52 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vincent Guittot X-Patchwork-Id: 9444 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 555E823E4F for ; Tue, 19 Jun 2012 08:30:05 +0000 (UTC) Received: from mail-gh0-f180.google.com (mail-gh0-f180.google.com [209.85.160.180]) by fiordland.canonical.com (Postfix) with ESMTP id B375CA18232 for ; Tue, 19 Jun 2012 08:30:01 +0000 (UTC) Received: by mail-gh0-f180.google.com with SMTP id z12so4769919ghb.11 for ; Tue, 19 Jun 2012 01:30:01 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=grURIm/+cYGxNVU/I3lr+Ai+RmImSQjrZ7Inh7p9wok=; b=NuhSldCJAlsTdcQGQO0XDJ2fJI6PB6OMN6wq9YuGxZ+Rd5a7voCQsy8nttN45/bT/D 33LxFycz+UJ/glKiCGcfXKZ9eM4Av1yctY19wTCbzIHEHLQnlxTqi+pmhbwkRxvoxCI9 HS+a/lUgl+DJP06FueBx1d26/oO8mAqlaysFN7cp+g9wQhM0Jh8NYsMnq1tnQS2Sc9qR CtNwN6V5pxrLa3tihkVQjhh+BtBCfZ0M5pQlF17Fb58jKAH53V8Ao6c1GqaelX/AkW50 c9qH+CksBh4tOfu2shQEEHgfv9bJlwbNw7SWqmSWoB9eawQ/cT9QC9b91xrtF1Xh18h0 VkEw== Received: by 10.50.203.39 with SMTP id kn7mr305622igc.53.1340094601142; Tue, 19 Jun 2012 01:30:01 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.24.148 with SMTP id v20csp112569ibb; Tue, 19 Jun 2012 01:29:59 -0700 (PDT) Received: by 10.180.99.70 with SMTP id eo6mr1253888wib.17.1340094598764; Tue, 19 Jun 2012 01:29:58 -0700 (PDT) Received: from mail-wg0-f50.google.com (mail-wg0-f50.google.com [74.125.82.50]) by mx.google.com with ESMTPS id c9si25782090wie.18.2012.06.19.01.29.58 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 19 Jun 2012 01:29:58 -0700 (PDT) Received-SPF: neutral (google.com: 74.125.82.50 is neither permitted nor denied by best guess record for domain of vincent.guittot@linaro.org) client-ip=74.125.82.50; Authentication-Results: mx.google.com; spf=neutral (google.com: 74.125.82.50 is neither permitted nor denied by best guess record for domain of vincent.guittot@linaro.org) smtp.mail=vincent.guittot@linaro.org Received: by wgbds11 with SMTP id ds11so5984686wgb.31 for ; Tue, 19 Jun 2012 01:29:58 -0700 (PDT) Received: by 10.216.141.15 with SMTP id f15mr8996673wej.82.1340094598043; Tue, 19 Jun 2012 01:29:58 -0700 (PDT) Received: from localhost.localdomain (LPuteaux-156-14-44-212.w82-127.abo.wanadoo.fr. [82.127.83.212]) by mx.google.com with ESMTPS id d3sm56434001wiz.9.2012.06.19.01.29.55 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 19 Jun 2012 01:29:57 -0700 (PDT) From: Vincent Guittot To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linaro-dev@lists.linaro.org, devicetree-discuss@lists.ozlabs.org Cc: linux@arm.linux.org.uk, a.p.zijlstra@chello.nl, grant.likely@secretlab.ca, rob.herring@calxeda.com, Vincent Guittot Subject: [PATCH v2 1/5] ARM: topology: Add arch_scale_freq_power function Date: Tue, 19 Jun 2012 10:28:52 +0200 Message-Id: <1340094536-20873-2-git-send-email-vincent.guittot@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1340094536-20873-1-git-send-email-vincent.guittot@linaro.org> References: <1340094536-20873-1-git-send-email-vincent.guittot@linaro.org> X-Gm-Message-State: ALoCoQlCjS5jLRGdoOIyHQKazbhVLEnzoe9TymfoNeaDbnNO6bSFoSXFm/1RXIDf9nLvo/UiNEQ7 Add infrastructure to be able to modify the cpu_power of each core Signed-off-by: Vincent Guittot --- arch/arm/include/asm/topology.h | 2 ++ arch/arm/kernel/topology.c | 38 +++++++++++++++++++++++++++++++++++++- 2 files changed, 39 insertions(+), 1 deletion(-) diff --git a/arch/arm/include/asm/topology.h b/arch/arm/include/asm/topology.h index 58b8b84..78e4c85 100644 --- a/arch/arm/include/asm/topology.h +++ b/arch/arm/include/asm/topology.h @@ -27,11 +27,13 @@ void init_cpu_topology(void); void store_cpu_topology(unsigned int cpuid); const struct cpumask *cpu_coregroup_mask(int cpu); +void set_power_scale(unsigned int cpu, unsigned long power); #else static inline void init_cpu_topology(void) { } static inline void store_cpu_topology(unsigned int cpuid) { } +static inline void set_power_scale(unsigned int cpu, unsigned long power) { } #endif #include diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c index 8200dea..37e2e57 100644 --- a/arch/arm/kernel/topology.c +++ b/arch/arm/kernel/topology.c @@ -22,6 +22,37 @@ #include #include +/* + * cpu power scale management + */ + +/* + * cpu power table + * This per cpu data structure describes the relative capacity of each core. + * On a heteregenous system, cores don't have the same computation capacity + * and we reflect that difference in the cpu_power field so the scheduler can + * take this difference into account during load balance. A per cpu structure + * is preferred because each CPU updates its own cpu_power field during the + * load balance except for idle cores. One idle core is selected to run the + * rebalance_domains for all idle cores and the cpu_power can be updated + * during this sequence. + */ +static DEFINE_PER_CPU(unsigned long, cpu_scale); + +unsigned long arch_scale_freq_power(struct sched_domain *sd, int cpu) +{ + return per_cpu(cpu_scale, cpu); +} + +void set_power_scale(unsigned int cpu, unsigned long power) +{ + per_cpu(cpu_scale, cpu) = power; +} + +/* + * cpu topology management + */ + #define MPIDR_SMP_BITMASK (0x3 << 30) #define MPIDR_SMP_VALUE (0x2 << 30) @@ -41,6 +72,9 @@ #define MPIDR_LEVEL2_MASK 0xFF #define MPIDR_LEVEL2_SHIFT 16 +/* + * cpu topology table + */ struct cputopo_arm cpu_topology[NR_CPUS]; const struct cpumask *cpu_coregroup_mask(int cpu) @@ -134,7 +168,7 @@ void init_cpu_topology(void) { unsigned int cpu; - /* init core mask */ + /* init core mask and power*/ for_each_possible_cpu(cpu) { struct cputopo_arm *cpu_topo = &(cpu_topology[cpu]); @@ -143,6 +177,8 @@ void init_cpu_topology(void) cpu_topo->socket_id = -1; cpumask_clear(&cpu_topo->core_sibling); cpumask_clear(&cpu_topo->thread_sibling); + + per_cpu(cpu_scale, cpu) = SCHED_POWER_SCALE; } smp_wmb(); }