From patchwork Tue Jun 19 08:28:54 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vincent Guittot X-Patchwork-Id: 9446 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 5F44E23E4F for ; Tue, 19 Jun 2012 08:30:16 +0000 (UTC) Received: from mail-gh0-f180.google.com (mail-gh0-f180.google.com [209.85.160.180]) by fiordland.canonical.com (Postfix) with ESMTP id 2FC81A187BC for ; Tue, 19 Jun 2012 08:30:16 +0000 (UTC) Received: by mail-gh0-f180.google.com with SMTP id z12so4769919ghb.11 for ; Tue, 19 Jun 2012 01:30:16 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=BfK0Om+oNvYPZwZLepfb4RQuxKHp0tJyH840VJVNqm4=; b=PkkSACKk7GZNm44zrKTy8P6uFy966ZzRScy6nLsKS6K1u3eIpHdfO3J1I3LhswlFJt Rx9hqB7ZI/PXjscvCqAaa8QeHoos8c9OyZr+/5dzIpENJhgUZQlBfXrfSoac9/482MuC eOnlwSHDgV/oksAcUXyeooLrvaxE281GPOG23tACiAQ7/lofmPHeS9g6m/al77t9RSWl fWFXgScZkUQnaKloWheZdtr69r4k+7F7dTq8eD1wDBSQ1dnqLG2yXe02x7Vm966AX81f +/U+hfiuyrXSLOhph4AaxX26uxUOGcTtzKIfpzgW1lTh+i2KNSURy1TB9WYB3jCEOcPi Lmkg== Received: by 10.42.89.72 with SMTP id f8mr7095080icm.33.1340094615792; Tue, 19 Jun 2012 01:30:15 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.24.148 with SMTP id v20csp112587ibb; Tue, 19 Jun 2012 01:30:14 -0700 (PDT) Received: by 10.180.81.65 with SMTP id y1mr1334361wix.1.1340094613982; Tue, 19 Jun 2012 01:30:13 -0700 (PDT) Received: from mail-wg0-f50.google.com (mail-wg0-f50.google.com [74.125.82.50]) by mx.google.com with ESMTPS id c9si25782090wie.18.2012.06.19.01.30.13 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 19 Jun 2012 01:30:13 -0700 (PDT) Received-SPF: neutral (google.com: 74.125.82.50 is neither permitted nor denied by best guess record for domain of vincent.guittot@linaro.org) client-ip=74.125.82.50; Authentication-Results: mx.google.com; spf=neutral (google.com: 74.125.82.50 is neither permitted nor denied by best guess record for domain of vincent.guittot@linaro.org) smtp.mail=vincent.guittot@linaro.org Received: by mail-wg0-f50.google.com with SMTP id ds11so5984686wgb.31 for ; Tue, 19 Jun 2012 01:30:13 -0700 (PDT) Received: by 10.180.24.39 with SMTP id r7mr1293745wif.9.1340094613188; Tue, 19 Jun 2012 01:30:13 -0700 (PDT) Received: from localhost.localdomain (LPuteaux-156-14-44-212.w82-127.abo.wanadoo.fr. [82.127.83.212]) by mx.google.com with ESMTPS id d3sm56434001wiz.9.2012.06.19.01.30.11 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 19 Jun 2012 01:30:12 -0700 (PDT) From: Vincent Guittot To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linaro-dev@lists.linaro.org, devicetree-discuss@lists.ozlabs.org Cc: linux@arm.linux.org.uk, a.p.zijlstra@chello.nl, grant.likely@secretlab.ca, rob.herring@calxeda.com, Vincent Guittot Subject: [PATCH v2 3/5] ARM: topology: Update cpu_power according to DT information Date: Tue, 19 Jun 2012 10:28:54 +0200 Message-Id: <1340094536-20873-4-git-send-email-vincent.guittot@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1340094536-20873-1-git-send-email-vincent.guittot@linaro.org> References: <1340094536-20873-1-git-send-email-vincent.guittot@linaro.org> X-Gm-Message-State: ALoCoQlwuIIPvVso3UL847/R3X+V4roRIQTbaPi291ircnQexDVxHJ4mM4uaICSpGKw1Ib2dA5S0 Use cpu compatibility field and clock-frequency field of DT to estimate the capacity of each core of the system and to update the cpu_power field accordingly. This patch enables to put more running tasks on big cores than on LITTLE ones. But this patch doesn't ensure that long running tasks will run on big cores and short ones on LITTLE cores. Signed-off-by: Vincent Guittot --- arch/arm/kernel/topology.c | 127 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 127 insertions(+) diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c index 92c2fb3..1922ea8 100644 --- a/arch/arm/kernel/topology.c +++ b/arch/arm/kernel/topology.c @@ -17,7 +17,9 @@ #include #include #include +#include #include +#include #include #include @@ -49,6 +51,126 @@ void set_power_scale(unsigned int cpu, unsigned long power) per_cpu(cpu_scale, cpu) = power; } +#ifdef CONFIG_OF +struct cpu_efficiency { + const char *compatible; + unsigned long efficiency; +}; + +/* + * Table of relative efficiency of each processors + * The efficiency value must fit in 20bit. The final + * cpu_scale value must be in the range + * 0 < cpu_scale < 2*SCHED_POWER_SCALE. + * Processors that are not defined in the table, + * use the default SCHED_POWER_SCALE value for cpu_scale. + */ +struct cpu_efficiency table_efficiency[] = { + {"arm,cortex-a15", 3891}, + {"arm,cortex-a7", 2048}, + {NULL, }, +}; + +struct cpu_capacity { + unsigned long hwid; + unsigned long capacity; +}; + +struct cpu_capacity *cpu_capacity; + +unsigned long middle_capacity = 1; + +static void __init parse_dt_topology(void) +{ + struct cpu_efficiency *cpu_eff; + struct device_node *cn = NULL; + unsigned long min_capacity = (unsigned long)(-1); + unsigned long max_capacity = 0; + unsigned long capacity = 0; + int alloc_size, cpu = 0; + + alloc_size = nr_cpu_ids * sizeof(struct cpu_capacity); + cpu_capacity = (struct cpu_capacity *)kzalloc(alloc_size, GFP_NOWAIT); + + while ((cn = of_find_node_by_type(cn, "cpu"))) { + const u32 *rate, *reg; + char *compatible; + int len; + + if (cpu >= num_possible_cpus()) + break; + + compatible = of_get_property(cn, "compatible", &len); + + for (cpu_eff = table_efficiency; cpu_eff->compatible; cpu_eff++) + if (of_device_is_compatible(cn, cpu_eff->compatible)) + break; + + if (cpu_eff->compatible == NULL) + continue; + + rate = of_get_property(cn, "clock-frequency", &len); + if (!rate || len != 4) { + pr_err("%s missing clock-frequency property\n", + cn->full_name); + continue; + } + + reg = of_get_property(cn, "reg", &len); + if (!reg || len != 4) { + pr_err("%s missing reg property\n", cn->full_name); + continue; + } + + capacity = ((be32_to_cpup(rate)) >> 20) + * cpu_eff->efficiency; + + /* Save min capacity of the system */ + if (capacity < min_capacity) + min_capacity = capacity; + + /* Save max capacity of the system */ + if (capacity > max_capacity) + max_capacity = capacity; + + cpu_capacity[cpu].capacity = capacity; + cpu_capacity[cpu++].hwid = be32_to_cpup(reg); + } + + if (cpu < num_possible_cpus()) + cpu_capacity[cpu].hwid = (unsigned long)(-1); + + middle_capacity = (min_capacity + max_capacity) >> 11; +} + +void update_cpu_power(unsigned int cpu, unsigned long hwid) +{ + unsigned int idx = 0; + + /* look for the cpu's hwid in the cpu capacity table */ + for (idx = 0; idx < num_possible_cpus(); idx++) { + if (cpu_capacity[idx].hwid == hwid) + break; + + if (cpu_capacity[idx].hwid == -1) + return; + } + + if (idx == num_possible_cpus()) + return; + + set_power_scale(cpu, cpu_capacity[idx].capacity / middle_capacity); + + printk(KERN_INFO "CPU%u: update cpu_power %lu\n", + cpu, arch_scale_freq_power(NULL, cpu)); +} + +#else +static inline void parse_dt_topology(void) {} +static inline void update_cpu_power(unsigned int cpuid, unsigned int mpidr) {} +#endif + + /* * cpu topology management */ @@ -62,6 +184,7 @@ void set_power_scale(unsigned int cpu, unsigned long power) * These masks reflect the current use of the affinity levels. * The affinity level can be up to 16 bits according to ARM ARM */ +#define MPIDR_HWID_BITMASK 0xFFFFFF #define MPIDR_LEVEL0_MASK 0x3 #define MPIDR_LEVEL0_SHIFT 0 @@ -159,6 +282,8 @@ void store_cpu_topology(unsigned int cpuid) update_siblings_masks(cpuid); + update_cpu_power(cpuid, mpidr & MPIDR_HWID_BITMASK); + printk(KERN_INFO "CPU%u: thread %d, cpu %d, socket %d, mpidr %x\n", cpuid, cpu_topology[cpuid].thread_id, cpu_topology[cpuid].core_id, @@ -186,4 +311,6 @@ void init_cpu_topology(void) per_cpu(cpu_scale, cpu) = SCHED_POWER_SCALE; } smp_wmb(); + + parse_dt_topology(); }